diff --git a/src/fifo_buffer/fifo_buffer.vhd b/src/fifo_buffer/fifo_buffer.vhd
index a968f2b..b518257 100644
--- a/src/fifo_buffer/fifo_buffer.vhd
+++ b/src/fifo_buffer/fifo_buffer.vhd
@@ -53,7 +53,8 @@ begin
   techmap_ram_inst : entity techmap.syncram_2p
   generic map(tech => tech, 
               abits => address_bits, 
-              dbits => fifo_width
+              dbits => fifo_width,
+              sepclk => 1
              )
   port map(
     rclk     => out_clk,
@@ -97,8 +98,8 @@ begin
     if rising_edge(in_clk) and valid_in = '1' and buffer_full = '0' then
       write_pointer <= std_logic_vector(unsigned(write_pointer) + 1);
     end if;
-    if rising_edge(out_clk) then
-      if ready_in = '1' and buffer_empty = '0' and unsigned(read_pointer) + 1 /= unsigned(write_pointer) then
+    if falling_edge(out_clk) then
+      if ready_in = '1' and buffer_empty = '0' then
         read_pointer <= std_logic_vector(unsigned(read_pointer) + 1);
         valid_out <= '1';
       else