diff --git a/src/ganimede.vhd b/src/ganimede.vhd
index 33eb20d..9521259 100644
--- a/src/ganimede.vhd
+++ b/src/ganimede.vhd
@@ -5,18 +5,26 @@ use work.io_types.all;
 
 entity ganimede is
   port (
+    clk                 : in std_logic;
+    reset               : in std_logic;
     ext_interface_in    : in ext_interface_in_t;
-    ext_interface_out   : out ext_interface_out_t
+    ext_interface_out   : out ext_interface_out_t;
+    int_interface_in    : in int_interface_in_t;
+    int_interface_out   : out int_interface_out_t
   );
 end entity ganimede;
 architecture rtl of ganimede is
   --- SIGNALS INTERFACING THE IP CORE
-  signal int_interface_in  : int_interface_in_t;
-  signal int_interface_out : int_interface_out_t;
+  signal gan_int_interface_in  : int_interface_in_t;
+  signal gan_int_interface_out : int_interface_out_t;
+  signal gan_ext_interface_in  : ext_interface_in_t;
+  signal gan_ext_interface_out : ext_interface_out_t;
   
   --- COMPONENT DECLERATIONS ---
   component socbridge_driver is
     port(
+      clk     : in std_logic;
+      reset   : in std_logic;
       ext_in  : in ext_socbridge_in_t;
       ext_out : out ext_socbridge_out_t;
       int_in  : in int_socbridge_in_t;
@@ -25,8 +33,29 @@ architecture rtl of ganimede is
   end component;
 
 begin
+  --- CONNECT EXTERNAL SIGNALS TO INTERNAL CONNECTIONS ---
+  gan_int_interface_in  <= int_interface_in;
+  int_interface_out     <= gan_int_interface_out;
+  gan_ext_interface_in  <= ext_interface_in;
+  ext_interface_out     <= gan_ext_interface_out;
   
+  --- DRIVER INSTANTIATION ---
+  socbridge_driver_inst: socbridge_driver
+   port map(
+      clk     => clk,
+      reset   => reset,
+      ext_in  => gan_ext_interface_in.socbridge,
+      ext_out => gan_ext_interface_out.socbridge,
+      int_in  => gan_int_interface_in.socbridge,
+      int_out => gan_int_interface_out.socbridge
+  );
 
 
-  
+
+
+  --- FIFO - DRIVER  CONNECTION ---
+
+
+  --- FIFO - IP-CORE CONNECTION ---
+
 end architecture rtl;