Adjusted io types for communication between control unit and driver. Also started testbench

src/control_socbridge_tb.vhd

@@ -0,0 +1,24 @@
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.NUMERIC_STD.all;
+library work;
+use work.io_types.all;
+use work.socbridge_driver_tb_pkg.all;
+
+entity control_socbridge_tb is
+end entity control_socbridge_tb;
+
+architecture tb of control_socbridge_tb is
+  
+begin
+
+  clock_proc: process
+  begin
+  for i in 0 to 50 loop
+    wait for cycle / 2;
+    clock <= not clock;
+  end loop;
+  wait;
+  end process clock_proc;
+  
+end architecture tb;

src/control_unit.vhd

@@ -7,9 +7,11 @@ use work.io_types.all;
 entity control_unit is
   
   port (
-    clk, rst: in std_logic;
+    clk, rst        : in  std_logic;
-    control_in: in control_unit_in_t;
+    ext_control_in  : in  ext_control_unit_in_t;
-    control_out: out control_unit_out_t
+    ext_control_out : out ext_control_unit_out_t;
+    int_control_in  : in  int_control_unit_in_t;
+    int_control_out : out int_control_unit_out_t;
   );
 
 end entity control_unit;
@@ -33,13 +35,13 @@ begin
   begin
     ored := '0';
     ready_reduction: for i in 0 to number_of_drivers - 1 loop
-      ored := ored or control_in.active_driver(i);
+      ored := ored or int_control_in.active_driver(i);
     end loop ready_reduction;
-    control_out.driver_id <= state.curr_driver;
+    int_control_out.driver_id <= state.curr_driver;
-    control_out.address <= state.address;
+    int_control_out.address <= state.address;
-    control_out.seq_mem_access_count <= state.seq_mem_access_count;        
+    int_control_out.seq_mem_access_count <= state.seq_mem_access_count;        
-    control_out.ready <= state.ready;
+    int_control_out.ready <= state.ready;
-    control_out.instruction <= state.instruction;
+    int_control_out.instruction <= state.instruction;
   end process comb_proc;
 
   sync_proc: process(clk, state)
@@ -54,10 +56,10 @@ begin
       else
         state.ready <= not ored;
         if ored = '0' then
-          state.address <= control_in.address;
+          state.address <= ext_control_in.address;
-          state.seq_mem_access_count <= control_in.seq_mem_access_count;
+          state.seq_mem_access_count <= ext_control_in.seq_mem_access_count;
-          state.curr_driver <= control_in.driver_id;
+          state.curr_driver <= ext_control_in.driver_id;
-          state.instruction <= control_in.instruction;
+          state.instruction <= ext_control_in.instruction;
         end if;
       end if;
     end if;

src/io_type_pkg.vhd

@@ -3,6 +3,12 @@ use IEEE.std_logic_1164.all;
 use IEEE.MATH_REAL.all;
 
 package io_types is
+  
+  --- CONSTANTS ---
+  constant number_of_drivers: natural := 3;
+  constant address_width: natural := 32;
+  constant seq_vector_length: natural := 8;
+  constant inst_word_width: natural := 8;
 
   --- STANDARD TYPES ---
   type ext_protocol_def_t is record
@@ -15,25 +21,28 @@ package io_types is
     socbridge: ext_protocol_def_t;
   end record interface_inst_t;
 
-  constant number_of_drivers: natural := 3;
+    type ext_control_unit_in_t is record
-  constant address_width: natural := 32;
-  constant seq_vector_length: natural := 8;
-  constant inst_word_width: natural := 8;
-
-  type control_unit_out_t is record
     driver_id: std_logic_vector(number_of_drivers - 1 downto 0);
     address: std_logic_vector(address_width - 1 downto 0);
     seq_mem_access_count: std_logic_vector(seq_vector_length - 1 downto 0);
-    ready: std_logic;
-    instruction: std_logic_vector(inst_word_width - 1 downto 0);
-  end record control_unit_out_t;
-
-  type control_unit_in_t is record
-    driver_id, active_driver: std_logic_vector(number_of_drivers - 1 downto 0);
-    address: std_logic_vector(address_width - 1 downto 0);
-    seq_mem_access_count: std_logic_vector(seq_vector_length - 1 downto 0);
     instruction: std_logic_vector(inst_word_width - 1 downto 0);
   end record control_unit_in_t;
+
+  type ext_control_unit_out_t is record
+    ready: std_logic;
+  end record ext_control_unit_out_t;
+
+  type int_control_unit_out_t is record
+    driver_id: std_logic_vector(number_of_drivers - 1 downto 0);
+    address: std_logic_vector(address_width - 1 downto 0);
+    seq_mem_access_count: std_logic_vector(seq_vector_length - 1 downto 0);
+    instruction: std_logic_vector(inst_word_width - 1 downto 0);
+  end record control_unit_out_t;
+
+  type int_control_unit_in_t is record
+    active_driver: std_logic_vector(number_of_drivers - 1 downto 0)
+  end record int_control_unit_out_t;
+
   --- PROTOCOL INFORMATION ---
   constant interface_inst : interface_inst_t := (
     socbridge => ("SoCBridge           ", 8, 2, 2)
@@ -41,23 +50,23 @@ package io_types is
 
   --- AUTOGENERATED TYPES ---
   type ext_socbridge_in_t is record 
-      payload : STD_LOGIC_VECTOR(interface_inst.socbridge.payload_width - 1 downto 0);
+    payload : STD_LOGIC_VECTOR(interface_inst.socbridge.payload_width - 1 downto 0);
-      control : STD_LOGIC_VECTOR(interface_inst.socbridge.control_width_in - 1 downto 0);
+    control : STD_LOGIC_VECTOR(interface_inst.socbridge.control_width_in - 1 downto 0);
   end record ext_socbridge_in_t;
 
   type ext_socbridge_out_t is record 
-      payload : STD_LOGIC_VECTOR(interface_inst.socbridge.payload_width - 1 downto 0);
+    payload : STD_LOGIC_VECTOR(interface_inst.socbridge.payload_width - 1 downto 0);
-      control : STD_LOGIC_VECTOR(interface_inst.socbridge.control_width_in - 1 downto 0);
+    control : STD_LOGIC_VECTOR(interface_inst.socbridge.control_width_in - 1 downto 0);
   end record ext_socbridge_out_t;
 
   type int_socbridge_in_t is record 
-      payload : STD_LOGIC_VECTOR(interface_inst.socbridge.payload_width - 1 downto 0);
+    payload : STD_LOGIC_VECTOR(interface_inst.socbridge.payload_width - 1 downto 0);
-      write_enable_in, is_full_out : std_logic;
+    write_enable_in, is_full_out : std_logic;
   end record int_socbridge_in_t;
 
   type int_socbridge_out_t is record 
-      payload : STD_LOGIC_VECTOR(interface_inst.socbridge.payload_width - 1 downto 0);
+    payload : STD_LOGIC_VECTOR(interface_inst.socbridge.payload_width - 1 downto 0);
-      write_enable_out, is_full_in : std_logic;
+    write_enable_out, is_full_in : std_logic;
   end record int_socbridge_out_t;
 
   type ext_interface_in_t is record