kryddan/exjobb-public
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precomputed arithemtic

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Adam 2025-05-22 21:44:57 +02:00
parent 25baae28ce
commit 16ba901c0e
1 changed files with 10 additions and 7 deletions
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9
src/socbridge/socbridge_driver.vhd
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@ -32,13 +32,16 @@ entity socbridge_driver is
end entity socbridge_driver;
architecture rtl of socbridge_driver is
type slice is array(0 to 3) of natural;
constant next_slice_32_8_upper : slice := (31, 7, 15, 23);
constant next_slice_32_8_lower : slice := (24, 0, 8, 15);
signal next_parity_out : std_logic;
signal ext_to_socbridge_driver_rec : ext_protocol_t;
signal next_data_out : std_logic_vector(interface_inst.socbridge.payload_width - 1 downto 0);
signal next_rx_transaction : transaction_t;
signal next_tx_transaction : transaction_t;
signal next_tx_data_size, next_rx_data_size : integer;
signal next_tx_data_size, next_rx_data_size : natural;
signal next_rx_state : rx_state_t;
signal next_tx_state : tx_state_t;
signal st : state_rec_t;
@ -248,7 +251,7 @@ begin
end if;
when TX_R_BODY =>
if st.tx_stage > 0 then
local_next_data_out := st.manager_data((((st.tx_stage - 1) mod 4) + 1) * 8 - 1 downto ((((st.tx_stage - 1) mod 4) + 1) - 1) * 8);
local_next_data_out := st.manager_data(next_slice_32_8_upper(st.tx_stage mod 4) downto next_slice_32_8_lower(st.tx_stage mod 4));
end if;
when ADDR1 =>
local_next_data_out := st.tx_addr(31 downto 24);
@ -507,7 +510,7 @@ begin
when RX_W_BODY =>
if st.rx_stage > 0 then
st.rx_stage <= st.rx_stage - 1;
st.manager_data((((st.rx_stage - 1) mod 4) + 1) * 8 - 1 downto ((((st.rx_stage - 1) mod 4) + 1) - 1) * 8) <= st.ext_to_socbridge_driver_reg.data;
st.manager_data(next_slice_32_8_upper(st.rx_stage mod 4) downto next_slice_32_8_lower(st.rx_stage mod 4)) <= st.ext_to_socbridge_driver_reg.data;
end if;
if (st.rx_stage - 2) mod 4 = 0 and st.rx_data_size - st.rx_stage > 4 then
st.manager_addr <= std_logic_vector(to_unsigned(to_integer(unsigned(st.manager_addr) + 4), 32));