diff --git a/src/control_socbridge_merge/control_socbridge_tb.vhd b/src/control_socbridge_merge/control_socbridge_tb.vhd index 91b5ba9..83afbb6 100644 --- a/src/control_socbridge_merge/control_socbridge_tb.vhd +++ b/src/control_socbridge_merge/control_socbridge_tb.vhd @@ -4,7 +4,7 @@ use IEEE.NUMERIC_STD.all; library ganimede; use ganimede.io_types.all; library gan_socbridge; -use gan_socbridge.socbridge_driver_tb_pkg.all; +use gan_socbridge.socbridge_driver_pkg.all; library controller; entity control_socbridge_tb is diff --git a/src/ganimede/.gitignore b/src/ganimede/.gitignore new file mode 100644 index 0000000..dca695e --- /dev/null +++ b/src/ganimede/.gitignore @@ -0,0 +1 @@ +ganimede diff --git a/src/ganimede/ganimede.vhd b/src/ganimede/ganimede.vhd index 96f02e3..ca3de76 100644 --- a/src/ganimede/ganimede.vhd +++ b/src/ganimede/ganimede.vhd @@ -3,7 +3,7 @@ use IEEE.std_logic_1164.all; library ganimede; use ganimede.io_types.all; library gan_socbridge; -use gan_socbridge.socbridge_driver_tb_pkg.all; +use gan_socbridge.socbridge_driver_pkg.all; library controller; entity ganimede_toplevel is @@ -20,10 +20,6 @@ entity ganimede_toplevel is end entity ganimede_toplevel; architecture rtl of ganimede_toplevel is --- SIGNAL DECLERATIONS --- - signal ext_to_drivers : ext_to_ganimede_t; - signal drivers_to_ext : ganimede_to_ext_t; - signal drivers_to_ip : ganimede_to_ip_t; - signal ip_to_drivers : ip_to_ganimede_t; signal drivers_to_controller : drivers_to_controller_t; signal controller_to_drivers : controller_to_drivers_t; @@ -48,13 +44,9 @@ architecture rtl of ganimede_toplevel is --end component; begin --- CONNECT EXTERNAL SIGNALS TO INTERNAL CONNECTIONS --- - ip_to_drivers <= ip_to_ganimede; - ganimede_to_ip <= drivers_to_ip; - ext_to_drivers <= ext_to_ganimede; - ganimede_to_ext <= drivers_to_ext; --- DRIVER INSTANTIATION --- - socbridge_inst: entity socbridge.socbridge_driver + socbridge_inst: entity gan_socbridge.socbridge_driver port map( clk => clk, rst => rst, diff --git a/src/ganimede/ganimede_tb.vhd b/src/ganimede/ganimede_tb.vhd index f9e1b50..64e5c27 100644 --- a/src/ganimede/ganimede_tb.vhd +++ b/src/ganimede/ganimede_tb.vhd @@ -4,7 +4,7 @@ use IEEE.NUMERIC_STD.all; library ganimede; use ganimede.io_types.all; library gan_socbridge; -use gan_socbridge.socbridge_driver_tb_pkg.all; +use gan_socbridge.socbridge_driver_pkg.all; library controller; entity ganimede_tb is diff --git a/src/socbridge/socbridge_driver.vhd b/src/socbridge/socbridge_driver.vhd index 512587a..a58b8e3 100644 --- a/src/socbridge/socbridge_driver.vhd +++ b/src/socbridge/socbridge_driver.vhd @@ -27,14 +27,12 @@ architecture rtl of socbridge_driver is signal next_parity_out : std_logic; signal ext_to_socbridge_driver_rec : ext_protocol_t; - shared variable socbridge_driver_to_ext_data_cmd : std_logic_vector(interface_inst.socbridge.payload_width - 1 downto 0); - shared variable next_rx_transaction : transaction_t; - shared variable next_tx_transaction : transaction_t; - signal test : std_logic_vector(interface_inst.socbridge.payload_width - 1 downto 0); + signal next_data_out : std_logic_vector(interface_inst.socbridge.payload_width - 1 downto 0); + signal next_rx_transaction : transaction_t; + signal next_tx_transaction : transaction_t; signal next_tx_data_size, next_rx_data_size : integer; signal next_rx_state : rx_state_t; signal next_tx_state : tx_state_t; - signal curr_cmd_bits : std_logic_vector(4 downto 0); signal st : state_rec_t; --- TRANSLATOR --- signal trans_st : translator_state_rec_t; @@ -44,15 +42,6 @@ architecture rtl of socbridge_driver is --- MANAGEMENT COMMUNICATION --- signal mgnt_valid_in, mgnt_valid_out, mgnt_ready_out : std_logic; begin - --- DEBUG GLOBAL BINDINGS --- - -- synthesis translate_off - G_next_parity_out <= next_parity_out; - G_ext_to_socbridge_driver_rec <= ext_to_socbridge_driver_rec; - G_socbridge_driver_to_ext_data_cmd <=test; - G_curr_command_bits <= curr_cmd_bits; - G_st <= st; - G_trans_st <= trans_st; - -- synthesis translate_on ext_to_socbridge_driver_rec.data <= ext_to_socbridge_driver.payload; ext_to_socbridge_driver_rec.clk <= ext_to_socbridge_driver.control(1); ext_to_socbridge_driver_rec.parity <= ext_to_socbridge_driver.control(0); @@ -61,29 +50,34 @@ begin st, controller_to_socbridge_driver, trans_st, tx_sent_response, rx_received_response) variable curr_response_bits : std_logic_vector(4 downto 0); + variable local_next_rx_transaction : transaction_t; + variable local_next_tx_transaction : transaction_t; + variable local_next_data_out : std_logic_vector(interface_inst.socbridge.payload_width - 1 downto 0); begin -- Helpful Bindings -- next_rx_data_size <= 2 ** to_integer(unsigned(ext_to_socbridge_driver.payload(2 downto 0))); curr_response_bits := ext_to_socbridge_driver.payload(7 downto 3); -- Set helper var to current transaction seen at the input. - next_rx_transaction := NO_OP; + local_next_rx_transaction := NO_OP; if curr_response_bits = "10000" then - next_rx_transaction := WRITE_ADD; + local_next_rx_transaction := WRITE_ADD; elsif curr_response_bits = "10100" then - next_rx_transaction := WRITE; + local_next_rx_transaction := WRITE; elsif curr_response_bits = "11000" then - next_rx_transaction := READ_ADD; + local_next_rx_transaction := READ_ADD; elsif curr_response_bits = "11100" then - next_rx_transaction := READ; + local_next_rx_transaction := READ; elsif curr_response_bits = "01001" then - next_rx_transaction := P_ERR; + local_next_rx_transaction := P_ERR; elsif curr_response_bits = "00101" or curr_response_bits = "00001" then - next_rx_transaction := WRITE_ACK; + local_next_rx_transaction := WRITE_ACK; elsif curr_response_bits = "01100" or curr_response_bits = "01000" then - next_rx_transaction := READ_RESPONSE; + local_next_rx_transaction := READ_RESPONSE; end if; -- Outputs -- - socbridge_driver_to_ext <= create_io_type_out_from_ext_protocol(st.socbridge_driver_to_ext_reg); + socbridge_driver_to_ext.payload <= st.socbridge_driver_to_ext_reg.data; + socbridge_driver_to_ext.control(0) <= st.socbridge_driver_to_ext_reg.parity; + socbridge_driver_to_ext.control(1) <= st.socbridge_driver_to_ext_reg.clk; if trans_st.curr_state = IDLE then socbridge_driver_to_controller.is_active <= '0'; else @@ -94,7 +88,7 @@ begin --- ### TX NEXT STATE ASSIGNMENTS ### --- case st.curr_tx_state is when IDLE => - if next_tx_transaction /= NO_OP then + if local_next_tx_transaction /= NO_OP then next_tx_state <= TX_HEADER; else next_tx_state <= IDLE; @@ -154,7 +148,7 @@ begin --- Next State Assignment Of RX FSM --- case st.curr_rx_state is when IDLE => - if next_rx_transaction /= NO_OP then + if local_next_rx_transaction /= NO_OP then next_rx_state <= RX_HEADER; else next_rx_state <= IDLE; @@ -214,7 +208,7 @@ begin --- Combinatorial output based on current state --- - socbridge_driver_to_ext_data_cmd := (others => '0'); + local_next_data_out := (others => '0'); socbridge_driver_to_ip.is_full_out <= '1'; socbridge_driver_to_ip.write_enable_in <= '0'; socbridge_driver_to_ip.payload <= (others => '0'); @@ -223,29 +217,29 @@ begin when IDLE => when TX_HEADER => if st.curr_tx_transaction = WRITE_ACK or st.curr_tx_transaction = READ_RESPONSE then - socbridge_driver_to_ext_data_cmd := get_header_bits(st.curr_tx_transaction, st.curr_rx_transaction) & get_size_bits(st.rx_data_size); + local_next_data_out := get_header_bits(st.curr_tx_transaction, st.curr_rx_transaction) & get_size_bits(st.rx_data_size); else - socbridge_driver_to_ext_data_cmd := get_header_bits(st.curr_tx_transaction, st.curr_rx_transaction) & get_size_bits(st.tx_data_size); + local_next_data_out := get_header_bits(st.curr_tx_transaction, st.curr_rx_transaction) & get_size_bits(st.tx_data_size); end if; when TX_W_BODY => if st.tx_stage > 0 then socbridge_driver_to_ip.is_full_out <= '0'; - socbridge_driver_to_ext_data_cmd := ip_to_socbridge_driver.payload; + local_next_data_out := ip_to_socbridge_driver.payload; end if; when TX_R_BODY => if st.tx_stage > 0 then socbridge_driver_to_ip.is_full_out <= '0'; - socbridge_driver_to_ext_data_cmd := ip_to_socbridge_driver.payload; + local_next_data_out := ip_to_socbridge_driver.payload; end if; when TX_AWAIT => when ADDR1 => - socbridge_driver_to_ext_data_cmd := st.curr_tx_addr(31 downto 24); + local_next_data_out := st.curr_tx_addr(31 downto 24); when ADDR2 => - socbridge_driver_to_ext_data_cmd := st.curr_tx_addr(23 downto 16); + local_next_data_out := st.curr_tx_addr(23 downto 16); when ADDR3 => - socbridge_driver_to_ext_data_cmd := st.curr_tx_addr(15 downto 8); + local_next_data_out := st.curr_tx_addr(15 downto 8); when ADDR4 => - socbridge_driver_to_ext_data_cmd := st.curr_tx_addr(7 downto 0); + local_next_data_out := st.curr_tx_addr(7 downto 0); end case; --- ### RX_STATE BASED OUTPUT ### --- mgnt_valid_in <= '0'; @@ -271,7 +265,7 @@ begin when ADDR3 => when ADDR4 => end case; - next_parity_out <= calc_parity(socbridge_driver_to_ext_data_cmd); + next_parity_out <= calc_parity(local_next_data_out); --- TRANSLATOR --- --- Next state assignment case trans_st.curr_state is @@ -303,14 +297,14 @@ begin end case; --- NEXT TX TRANSACTION --- - next_tx_transaction := NO_OP; + local_next_tx_transaction := NO_OP; next_tx_data_size <= 0; if trans_st.curr_state = IDLE and st.curr_rx_state = RX_AWAIT then if st.curr_rx_transaction = WRITE or st.curr_rx_transaction = WRITE_ADD then - next_tx_transaction := WRITE_ACK; + local_next_tx_transaction := WRITE_ACK; elsif st.curr_rx_transaction = READ or st.curr_rx_transaction = READ_ADD then next_tx_data_size <= st.rx_data_size; - next_tx_transaction := READ_RESPONSE; + local_next_tx_transaction := READ_RESPONSE; end if; end if; case trans_st.curr_state is @@ -318,15 +312,15 @@ begin when SEND => if trans_st.is_first_word = '1' then if trans_st.curr_inst.instruction = READ then - next_tx_transaction := READ_ADD; + local_next_tx_transaction := READ_ADD; elsif trans_st.curr_inst.instruction = WRITE then - next_tx_transaction := WRITE_ADD; + local_next_tx_transaction := WRITE_ADD; end if; else if trans_st.curr_inst.instruction = READ then - next_tx_transaction := READ; + local_next_tx_transaction := READ; elsif trans_st.curr_inst.instruction = WRITE then - next_tx_transaction := WRITE; + local_next_tx_transaction := WRITE; end if; end if; @@ -340,6 +334,9 @@ begin when others => end case; + next_tx_transaction <= local_next_tx_transaction; + next_rx_transaction <= local_next_rx_transaction; + next_data_out <= local_next_data_out; end process comb_proc; -- Process updating internal registers based on primary clock seq_proc: process(ext_to_socbridge_driver_rec.clk, rst, clk) @@ -365,7 +362,7 @@ begin st.ext_to_socbridge_driver_reg.data <= ext_to_socbridge_driver_rec.data; st.ext_to_socbridge_driver_reg.clk <= ext_to_socbridge_driver_rec.clk; st.ext_to_socbridge_driver_reg.parity <= ext_to_socbridge_driver_rec.parity; - st.socbridge_driver_to_ext_reg.data <= socbridge_driver_to_ext_data_cmd; + st.socbridge_driver_to_ext_reg.data <= next_data_out; st.socbridge_driver_to_ext_reg.clk <= not st.socbridge_driver_to_ext_reg.clk; st.socbridge_driver_to_ext_reg.parity <= next_parity_out; st.curr_tx_state <= next_tx_state; diff --git a/src/socbridge/socbridge_driver_pkg.vhd b/src/socbridge/socbridge_driver_pkg.vhd index eee87af..28769cf 100644 --- a/src/socbridge/socbridge_driver_pkg.vhd +++ b/src/socbridge/socbridge_driver_pkg.vhd @@ -57,18 +57,6 @@ package socbridge_driver_pkg is pure function get_header_bits(transaction : transaction_t; caused_by: transaction_t) return std_logic_vector; pure function get_size_bits(size : command_size_t) return std_logic_vector; pure function get_size_bits_sim(size : command_size_t) return std_logic_vector; - --- DEBUG GLOBAL SIGNALS --- - -- synthesis translate_off - signal G_next_parity_out : std_logic; - signal G_ext_to_socbridge_driver_rec : ext_protocol_t; - signal G_socbridge_driver_to_ext_data_cmd : std_logic_vector(interface_inst.socbridge.payload_width - 1 downto 0); - signal G_next_rx_state : rx_state_t; - signal G_next_tx_state : tx_state_t; - signal G_curr_command_bits : std_logic_vector(4 downto 0); - signal G_curr_response_bits : std_logic_vector(4 downto 0); - signal G_st : state_rec_t; - signal G_trans_st : translator_state_rec_t; - -- synthesis translate_on end package socbridge_driver_pkg;