From 2be506209c28a82e10756bbf8c8a9fd0b3697688 Mon Sep 17 00:00:00 2001 From: Adam Magnusson Date: Tue, 4 Mar 2025 16:33:49 +0100 Subject: [PATCH] Made instruction a byte instead of a bit --- src/control_unit.vhd | 9 +++++---- src/control_unit_tb.vhd | 8 ++++---- src/io_type_pkg.vhd | 6 ++++-- 3 files changed, 13 insertions(+), 10 deletions(-) diff --git a/src/control_unit.vhd b/src/control_unit.vhd index 64cbe0c..7c4095b 100644 --- a/src/control_unit.vhd +++ b/src/control_unit.vhd @@ -19,7 +19,8 @@ architecture behave of control_unit is address: std_logic_vector(address_width - 1 downto 0); seq_mem_access_count: std_logic_vector(seq_vector_length - 1 downto 0); curr_driver: std_logic_vector(number_of_drivers - 1 downto 0); --one-hot encoded, 0 means disabled - ready, is_write: std_logic; + ready: std_logic; + instruction: std_logic_vector(inst_word_width - 1 downto 0); end record state_t; signal state: state_t; @@ -38,7 +39,7 @@ begin control_out.address <= state.address; control_out.seq_mem_access_count <= state.seq_mem_access_count; control_out.ready <= state.ready; - control_out.is_write <= state.is_write; + control_out.instruction <= state.instruction; end process comb_proc; sync_proc: process(clk, state) @@ -49,14 +50,14 @@ begin (others => '0'), (others => '0'), '1', - '0'); + x"00"); else state.ready <= not ored; if ored = '0' then state.address <= control_in.address; state.seq_mem_access_count <= control_in.seq_mem_access_count; state.curr_driver <= control_in.driver_id; - state.is_write <= control_in.is_write; + state.instruction <= control_in.instruction; end if; end if; end if; diff --git a/src/control_unit_tb.vhd b/src/control_unit_tb.vhd index 3921f52..62eefd8 100644 --- a/src/control_unit_tb.vhd +++ b/src/control_unit_tb.vhd @@ -18,13 +18,13 @@ architecture tb of control_unit_tb is (others => '0'), (others => '0'), (others => '0'), - '0'); + x"00"); signal control_output: control_unit_out_t := ( (others => '0'), (others => '0'), (others => '1'), '1', - '0'); + x"00"); signal current_driver : std_logic_vector(2 downto 0) := "000"; shared variable word_counter: natural := 0; @@ -55,7 +55,7 @@ begin control_input.active_driver <= "000"; control_input.address <= x"F0F0F0F0"; control_input.seq_mem_access_count <= "00000011"; - control_input.is_write <= '1'; + control_input.instruction <= x"81"; word_counter := 3; wait for cycle; current_driver <= "010"; @@ -79,7 +79,7 @@ begin wait for cycle; assert control_output.driver_id = "010" report "Incorrect driver_id from control_unit" severity error; assert control_output.address = x"F0F0F0F0" report "Incorrect address from control_unit" severity error; - assert control_output.is_write = '0' report "Incorrect memory op from control_unit" severity error; + assert control_output.instruction = x"81" report "Incorrect memory op from control_unit" severity error; wait for 5 * cycle; reset <= '1'; diff --git a/src/io_type_pkg.vhd b/src/io_type_pkg.vhd index ea50409..6238419 100644 --- a/src/io_type_pkg.vhd +++ b/src/io_type_pkg.vhd @@ -18,19 +18,21 @@ package io_types is constant number_of_drivers: natural := 3; constant address_width: natural := 32; constant seq_vector_length: natural := 8; + constant inst_word_width: natural := 8; type control_unit_out_t is record driver_id: std_logic_vector(number_of_drivers - 1 downto 0); address: std_logic_vector(address_width - 1 downto 0); seq_mem_access_count: std_logic_vector(seq_vector_length - 1 downto 0); - ready, is_write: std_logic; + ready: std_logic; + instruction: std_logic_vector(inst_word_width - 1 downto 0); end record control_unit_out_t; type control_unit_in_t is record driver_id, active_driver: std_logic_vector(number_of_drivers - 1 downto 0); address: std_logic_vector(address_width - 1 downto 0); seq_mem_access_count: std_logic_vector(seq_vector_length - 1 downto 0); - is_write: std_logic; + instruction: std_logic_vector(inst_word_width - 1 downto 0); end record control_unit_in_t; --- PROTOCOL INFORMATION --- constant interface_inst : interface_inst_t := (