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constrained ints and relaxed (made worse) boundary checks, replace relative ops with equals

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This commit is contained in:
Erik Örtenberg 2025-05-27 21:55:12 +02:00
parent 0c44ea45db
commit 4fa2b530ca
2 changed files with 21 additions and 25 deletions
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40
src/socbridge/socbridge_driver.vhd
View File

@ -239,10 +239,10 @@ begin
socbridge_driver_to_ip.ready <= '1'; socbridge_driver_to_ip.ready <= '1';
end if; end if;
when TX_W_BODY => when TX_W_BODY =>
if st.tx_stage > 1 then if st.tx_stage /= 1 and st.tx_stage /= 0 then
socbridge_driver_to_ip.ready <= '1'; socbridge_driver_to_ip.ready <= '1';
end if; end if;
if st.tx_stage > 0 then if st.tx_stage /= 0 then
if ip_to_socbridge_driver.fifo.valid = '1' then if ip_to_socbridge_driver.fifo.valid = '1' then
local_next_data_out := ip_to_socbridge_driver.fifo.data; local_next_data_out := ip_to_socbridge_driver.fifo.data;
else else
@ -250,7 +250,7 @@ begin
end if; end if;
end if; end if;
when TX_R_BODY => when TX_R_BODY =>
if st.tx_stage > 0 then if st.tx_stage /= 0 then
local_next_data_out := st.manager_data(next_slice_32_8_upper(st.tx_stage mod 4) downto next_slice_32_8_lower(st.tx_stage mod 4)); local_next_data_out := st.manager_data(next_slice_32_8_upper(st.tx_stage mod 4) downto next_slice_32_8_lower(st.tx_stage mod 4));
end if; end if;
when ADDR1 => when ADDR1 =>
@ -310,7 +310,7 @@ begin
trans_write_next_state <= AWAIT; trans_write_next_state <= AWAIT;
-- Wait for driver to finish current instruction, then reenter SEND -- Wait for driver to finish current instruction, then reenter SEND
when AWAIT => when AWAIT =>
if trans_st.write.inst.access_count <= MAX_PKT_SIZE and not st.write_in_flight then if trans_st.write.inst.access_count = MAX_PKT_SIZE and not st.write_in_flight then
trans_write_next_state <= IDLE; trans_write_next_state <= IDLE;
elsif ip_to_socbridge_driver.fifo.used_slots = 0 and ip_to_socbridge_driver.flush = '1' elsif ip_to_socbridge_driver.fifo.used_slots = 0 and ip_to_socbridge_driver.flush = '1'
and not st.write_in_flight then and not st.write_in_flight then
@ -330,7 +330,7 @@ begin
elsif st.rx_transaction = READ or st.rx_transaction = READ_ADD elsif st.rx_transaction = READ or st.rx_transaction = READ_ADD
or st.rx_transaction = WRITE or st.rx_transaction = WRITE_ADD then or st.rx_transaction = WRITE or st.rx_transaction = WRITE_ADD then
trans_read_next_state <= IDLE; trans_read_next_state <= IDLE;
elsif trans_st.read.inst.request = '1' and BUFFER_SIZE - ip_to_socbridge_driver.read_fifo.used_slots > 2*MAX_PKT_SIZE then elsif trans_st.read.inst.request = '1' and ip_to_socbridge_driver.read_fifo.used_slots < BUFFER_SIZE - 2*MAX_PKT_SIZE then
trans_read_next_state <= SEND; trans_read_next_state <= SEND;
else else
trans_read_next_state <= IDLE; trans_read_next_state <= IDLE;
@ -347,11 +347,11 @@ begin
trans_read_next_state <= AWAIT; trans_read_next_state <= AWAIT;
-- Wait for driver to finish current instruction, then reenter SEND -- Wait for driver to finish current instruction, then reenter SEND
when AWAIT => when AWAIT =>
if trans_st.read.inst.access_count <= MAX_PKT_SIZE and not st.read_in_flight then if trans_st.read.inst.access_count = 0 and not st.read_in_flight then
trans_read_next_state <= IDLE; trans_read_next_state <= IDLE;
elsif ip_to_socbridge_driver.flush = '1'and not st.read_in_flight then elsif ip_to_socbridge_driver.flush = '1'and not st.read_in_flight then
trans_read_next_state <= IDLE; trans_read_next_state <= IDLE;
elsif not st.read_in_flight and BUFFER_SIZE - ip_to_socbridge_driver.read_fifo.used_slots > 2*MAX_PKT_SIZE then elsif not st.read_in_flight and ip_to_socbridge_driver.read_fifo.used_slots < BUFFER_SIZE - 2*MAX_PKT_SIZE then
trans_read_next_state <= SEND; trans_read_next_state <= SEND;
else else
trans_read_next_state <= AWAIT; trans_read_next_state <= AWAIT;
@ -375,12 +375,10 @@ begin
else else
local_next_tx_transaction := READ; local_next_tx_transaction := READ;
end if; end if;
if trans_st.read.inst.access_count > MAX_PKT_SIZE then if trans_st.read.inst.access_count /= MAX_PKT_SIZE then
next_tx_data_size <= MAX_PKT_SIZE; next_tx_data_size <= MAX_PKT_SIZE;
elsif trans_st.read.inst.access_count > 0 then else
next_tx_data_size <= trans_st.read.inst.access_count; next_tx_data_size <= trans_st.read.inst.access_count;
else
next_tx_data_size <= 0;
end if; end if;
elsif trans_st.write.state = SEND and not st.read_in_flight then elsif trans_st.write.state = SEND and not st.read_in_flight then
if trans_st.write.is_first_word = '1' then if trans_st.write.is_first_word = '1' then
@ -388,12 +386,10 @@ begin
else else
local_next_tx_transaction := WRITE; local_next_tx_transaction := WRITE;
end if; end if;
if trans_st.write.inst.access_count > MAX_PKT_SIZE then if trans_st.write.inst.access_count /= MAX_PKT_SIZE then
next_tx_data_size <= MAX_PKT_SIZE; next_tx_data_size <= MAX_PKT_SIZE;
elsif trans_st.write.inst.access_count > 0 then
next_tx_data_size <= trans_st.write.inst.access_count;
else else
next_tx_data_size <= 0; next_tx_data_size <= trans_st.write.inst.access_count;
end if; end if;
end if; end if;
@ -454,11 +450,11 @@ begin
end if; end if;
end if; end if;
when TX_W_BODY => when TX_W_BODY =>
if st.tx_stage > 0 then if st.tx_stage /= 0 then
st.tx_stage <= st.tx_stage - 1; st.tx_stage <= st.tx_stage - 1;
end if; end if;
when TX_R_BODY => when TX_R_BODY =>
if st.tx_stage > 0 then if st.tx_stage /= 0 then
st.tx_stage <= st.tx_stage - 1; st.tx_stage <= st.tx_stage - 1;
end if; end if;
when others => when others =>
@ -494,7 +490,7 @@ begin
end if; end if;
end if; end if;
when RX_R_BODY => when RX_R_BODY =>
if st.rx_stage > 0 then if st.rx_stage /= 0 then
st.rx_stage <= st.rx_stage - 1; st.rx_stage <= st.rx_stage - 1;
end if; end if;
if next_rx_transaction /= NO_OP and st.rx_stage <= 1 then if next_rx_transaction /= NO_OP and st.rx_stage <= 1 then
@ -508,19 +504,19 @@ begin
end if; end if;
end if; end if;
when RX_W_BODY => when RX_W_BODY =>
if st.rx_stage > 0 then if st.rx_stage /= 0 then
st.rx_stage <= st.rx_stage - 1; st.rx_stage <= st.rx_stage - 1;
st.manager_data(next_slice_32_8_upper(st.rx_stage mod 4) downto next_slice_32_8_lower(st.rx_stage mod 4)) <= st.ext_to_socbridge_driver_reg.data; st.manager_data(next_slice_32_8_upper(st.rx_stage mod 4) downto next_slice_32_8_lower(st.rx_stage mod 4)) <= st.ext_to_socbridge_driver_reg.data;
end if; end if;
if (st.rx_stage - 2) mod 4 = 0 and st.rx_data_size - st.rx_stage > 4 then if st.rx_stage mod 4 = 2 and st.rx_data_size - st.rx_stage > 4 then
st.manager_addr <= std_logic_vector(to_unsigned(to_integer(unsigned(st.manager_addr) + 4), 32)); st.manager_addr <= std_logic_vector(to_unsigned(to_integer(unsigned(st.manager_addr) + 4), 32));
end if; end if;
when RX_AWAIT => when RX_AWAIT =>
st.manager_data <= manager_to_socbridge_driver.data; st.manager_data <= manager_to_socbridge_driver.data;
if st.tx_transaction = READ_RESPONSE or st.tx_transaction = WRITE_ACK then if st.tx_transaction = READ_RESPONSE or st.tx_transaction = WRITE_ACK then
if (st.rx_transaction = READ or st.rx_transaction = READ_ADD) and (st.tx_stage - 2) mod 4 = 0 then if (st.rx_transaction = READ or st.rx_transaction = READ_ADD) and st.tx_stage mod 4 = 2 then
st.manager_addr <= std_logic_vector(to_unsigned(to_integer(unsigned(st.manager_addr) + 4), 32)); st.manager_addr <= std_logic_vector(to_unsigned(to_integer(unsigned(st.manager_addr) + 4), 32));
elsif (st.rx_transaction = WRITE or st.rx_transaction = WRITE_ADD) and (st.rx_stage - 2) mod 4 = 0 then elsif (st.rx_transaction = WRITE or st.rx_transaction = WRITE_ADD) and st.rx_stage mod 4 = 2 then
st.manager_addr <= std_logic_vector(to_unsigned(to_integer(unsigned(st.manager_addr) + 4), 32)); st.manager_addr <= std_logic_vector(to_unsigned(to_integer(unsigned(st.manager_addr) + 4), 32));
end if; end if;
end if; end if;

6
src/socbridge/socbridge_driver_pkg.vhd
View File

@ -26,7 +26,7 @@ package socbridge_driver_pkg is
type ctrl_inst_t is record type ctrl_inst_t is record
request : std_logic; request : std_logic;
address : std_logic_vector(address_width - 1 downto 0); address : std_logic_vector(address_width - 1 downto 0);
access_count : integer; access_count : natural range 0 to 2**25;
end record ctrl_inst_t; end record ctrl_inst_t;
type ctrl_inst_state_rec_t is record type ctrl_inst_state_rec_t is record
@ -52,8 +52,8 @@ package socbridge_driver_pkg is
rx_state: rx_state_t; rx_state: rx_state_t;
tx_state: tx_state_t; tx_state: tx_state_t;
ext_to_socbridge_driver_reg, socbridge_driver_to_ext_reg : ext_protocol_t; ext_to_socbridge_driver_reg, socbridge_driver_to_ext_reg : ext_protocol_t;
tx_stage, rx_stage : NATURAL; tx_stage, rx_stage : NATURAL range 0 to 2**25;
tx_data_size, rx_data_size : integer; tx_data_size, rx_data_size : integer range 0 to 2**25;
tx_addr : std_logic_vector(31 downto 0); tx_addr : std_logic_vector(31 downto 0);
read_in_flight : boolean; read_in_flight : boolean;
write_in_flight : boolean; write_in_flight : boolean;