diff --git a/src/socbridge/socbridge_driver.vhd b/src/socbridge/socbridge_driver.vhd
index 9fdcfb0..69fbf9c 100644
--- a/src/socbridge/socbridge_driver.vhd
+++ b/src/socbridge/socbridge_driver.vhd
@@ -604,13 +604,11 @@ begin
       trans_st.read.curr_inst.request <= '0';
       trans_st.read.curr_inst.address <= (others => '0');
       trans_st.read.curr_inst.seq_mem_access_count <= 0;
-      trans_st.read.curr_inst.instruction <= NO_OP;
       trans_st.read.is_first_word <= '1';
       trans_st.write.curr_state <= IDLE;
       trans_st.write.curr_inst.request <= '0';
       trans_st.write.curr_inst.address <= (others => '0');
       trans_st.write.curr_inst.seq_mem_access_count <= 0;
-      trans_st.write.curr_inst.instruction <= NO_OP;
       trans_st.write.is_first_word <= '1';
     elsif(rising_edge(ext_to_socbridge_driver_rec.clk)) then
       trans_st.read.curr_state <= trans_read_next_state;
@@ -619,7 +617,9 @@ begin
         when IDLE =>
           if controller_to_socbridge_driver.request = '1' and controller_to_socbridge_driver.instruction = WRITE 
              and trans_st.write.curr_inst.request = '0' then
-            trans_st.write.curr_inst <= controller_to_socbridge_driver;
+            trans_st.write.curr_inst.request <= controller_to_socbridge_driver.request;
+            trans_st.write.curr_inst.address <= controller_to_socbridge_driver.address;
+            trans_st.write.curr_inst.seq_mem_access_count <= controller_to_socbridge_driver.seq_mem_access_count;
           else 
           end if;
           trans_st.write.is_first_word <= '1';
@@ -642,7 +642,6 @@ begin
             trans_st.write.curr_inst.request <= '0';
             trans_st.write.curr_inst.address <= (others => '0');
             trans_st.write.curr_inst.seq_mem_access_count <= 0;
-            trans_st.write.curr_inst.instruction <= NO_OP;
           end if;
           if trans_st.write.curr_inst.seq_mem_access_count mod 256 = 0 then
             trans_st.write.is_first_word <= '1';
@@ -657,7 +656,9 @@ begin
       case trans_st.read.curr_state is
         when IDLE =>
           if controller_to_socbridge_driver.request = '1' and controller_to_socbridge_driver.instruction = READ then
-            trans_st.read.curr_inst <= controller_to_socbridge_driver;
+            trans_st.read.curr_inst.request <= controller_to_socbridge_driver.request;
+            trans_st.read.curr_inst.address <= controller_to_socbridge_driver.address;
+            trans_st.read.curr_inst.seq_mem_access_count <= controller_to_socbridge_driver.seq_mem_access_count;
           else 
           end if;
           trans_st.read.is_first_word <= '1';
@@ -678,7 +679,6 @@ begin
             trans_st.read.curr_inst.request <= '0';
             trans_st.read.curr_inst.address <= (others => '0');
             trans_st.read.curr_inst.seq_mem_access_count <= 0;
-            trans_st.read.curr_inst.instruction <= NO_OP;
           end if;
           if trans_st.read.curr_inst.seq_mem_access_count mod 256 = 0 then
             trans_st.read.is_first_word <= '1';
diff --git a/src/socbridge/socbridge_driver_pkg.vhd b/src/socbridge/socbridge_driver_pkg.vhd
index 2e712e4..df7c54a 100644
--- a/src/socbridge/socbridge_driver_pkg.vhd
+++ b/src/socbridge/socbridge_driver_pkg.vhd
@@ -23,8 +23,15 @@ package socbridge_driver_pkg is
   --- TRANSLATOR ---
   type ctrl_inst_state_t is (IDLE, SEND, SEND_ACCEPTED, AWAIT);
 
+  type ctrl_inst_t is record
+    request              : std_logic;
+    address              : std_logic_vector(address_width - 1 downto 0);
+    seq_mem_access_count : integer;
+    instruction          : instruction_command_t;
+  end record ctrl_inst_t;
+
   type ctrl_inst_state_rec_t is record
-    curr_inst : controller_to_socbridge_driver_t;
+    curr_inst : ctrl_inst_t;
     curr_state : ctrl_inst_state_t;
     is_first_word : std_logic;
   end record ctrl_inst_state_rec_t;