tested, fixed and verified multimessage packet reads
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@ -137,7 +137,6 @@ begin
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ext_control_input.cmd <= "00";
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ext_control_input.cmd <= "00";
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wait until int_control_input.active_driver(0) = '0';
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wait until int_control_input.active_driver(0) = '0';
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wait for CLK_PERIOD;
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wait for CLK_PERIOD;
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ext_control_input.seq_mem_access_count <= 2;
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report "Task completed in driver, sending next task...";
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report "Task completed in driver, sending next task...";
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ext_control_input.address <= x"FA0FA0FA";
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ext_control_input.address <= x"FA0FA0FA";
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ext_control_input.cmd <= "10";
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ext_control_input.cmd <= "10";
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@ -149,6 +148,10 @@ begin
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wait until int_control_input.active_driver(0) = '0';
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wait until int_control_input.active_driver(0) = '0';
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wait for CLK_PERIOD;
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wait for CLK_PERIOD;
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report "Task completed in driver, ending simulation stimulus";
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report "Task completed in driver, ending simulation stimulus";
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ext_control_input.address <= (others => '0');
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ext_control_input.cmd <= "00";
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ext_control_input.driver_id <= "0";
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ext_control_input.seq_mem_access_count <= 0;
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wait;
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wait;
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end process stimulus_proc;
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end process stimulus_proc;
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@ -160,6 +163,7 @@ begin
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end process external_stimulus_signal;
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end process external_stimulus_signal;
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external_stimulus: process
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external_stimulus: process
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variable input : positive := 1;
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begin
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begin
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wait for CLK_PERIOD / 1000;
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wait for CLK_PERIOD / 1000;
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curr_word <= "00000000";
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curr_word <= "00000000";
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@ -176,15 +180,26 @@ begin
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curr_word <= "00000000";
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curr_word <= "00000000";
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wait for CLK_PERIOD * 140;
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wait for CLK_PERIOD * 140;
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curr_word <= "00101001";
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curr_word <= "00101001";
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wait for CLK_PERIOD*20;
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curr_word <= "01100001";
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wait for CLK_PERIOD;
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curr_word <= "00100000";
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wait for CLK_PERIOD;
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curr_word <= "00010000";
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wait for CLK_PERIOD;
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wait for CLK_PERIOD;
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curr_word <= "00000000";
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curr_word <= "00000000";
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wait for CLK_PERIOD * 20;
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curr_word <= "01100111";
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wait for CLK_PERIOD;
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for x in 0 to 127 loop
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curr_word <= std_logic_vector(to_unsigned(input, 8));
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input := input + 1 mod 256;
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wait for CLK_PERIOD;
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end loop;
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curr_word <= "00000000";
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wait for CLK_PERIOD * 140;
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wait for CLK_PERIOD * 20;
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curr_word <= "01100111";
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wait for CLK_PERIOD;
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for x in 0 to 127 loop
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curr_word <= std_logic_vector(to_unsigned(input, 8));
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input := input + 1 mod 256;
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wait for CLK_PERIOD;
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end loop;
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wait;
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wait;
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end process external_stimulus;
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end process external_stimulus;
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@ -170,8 +170,6 @@ begin
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else
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else
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next_state <= RX_RESPONSE;
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next_state <= RX_RESPONSE;
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end if;
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end if;
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when RX_BODY_NO_OUT =>
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next_state <= RX_BODY;
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when RX_BODY =>
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when RX_BODY =>
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-- Here we want to stay in RX_BODY for the duration of a packet.
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-- Here we want to stay in RX_BODY for the duration of a packet.
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if st.read_stage = 0 then
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if st.read_stage = 0 then
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@ -227,7 +225,6 @@ begin
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ext_out_data_cmd := st.curr_addr(7 downto 0);
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ext_out_data_cmd := st.curr_addr(7 downto 0);
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end if;
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end if;
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when RX_RESPONSE =>
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when RX_RESPONSE =>
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when RX_BODY_NO_OUT =>
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when RX_BODY =>
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when RX_BODY =>
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int_out.payload <= st.ext_in_reg.data;
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int_out.payload <= st.ext_in_reg.data;
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int_out.write_enable_in <= '1';
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int_out.write_enable_in <= '1';
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@ -189,9 +189,6 @@ begin
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expected_out <= "00000000";
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expected_out <= "00000000";
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check_next_state(RX_RESPONSE);
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check_next_state(RX_RESPONSE);
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wait for CLK_PERIOD;
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wait for CLK_PERIOD;
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wait for CLK_PERIOD / 4;
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check_next_state(RX_BODY_NO_OUT);
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wait for CLK_PERIOD * 3 /4;
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check_next_state(RX_BODY);
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check_next_state(RX_BODY);
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wait for CLK_PERIOD;
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wait for CLK_PERIOD;
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check_next_state(RX_BODY);
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check_next_state(RX_BODY);
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@ -219,9 +216,6 @@ begin
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expected_out <= "00000000";
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expected_out <= "00000000";
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check_next_state(RX_RESPONSE);
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check_next_state(RX_RESPONSE);
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wait for CLK_PERIOD;
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wait for CLK_PERIOD;
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wait for CLK_PERIOD / 4;
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check_next_state(RX_BODY_NO_OUT);
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wait for CLK_PERIOD * 3 /4;
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check_next_state(RX_BODY);
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check_next_state(RX_BODY);
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wait for CLK_PERIOD;
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wait for CLK_PERIOD;
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check_next_state(RX_BODY);
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check_next_state(RX_BODY);
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@ -18,7 +18,7 @@ package socbridge_driver_tb_pkg is
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type state_t is
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type state_t is
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(IDLE, ADDR1, ADDR2, ADDR3, ADDR4,
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(IDLE, ADDR1, ADDR2, ADDR3, ADDR4,
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TX_HEADER, TX_BODY, TX_ACK,
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TX_HEADER, TX_BODY, TX_ACK,
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RX_HEADER, RX_RESPONSE, RX_BODY_NO_OUT, RX_BODY);
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RX_HEADER, RX_RESPONSE, RX_BODY);
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--- TRANSLATOR ---
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--- TRANSLATOR ---
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type translator_state_t is (IDLE, SEND, SEND_ACCEPTED, AWAIT);
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type translator_state_t is (IDLE, SEND, SEND_ACCEPTED, AWAIT);
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