Rough outline of new FSMs probably done. All remaining work is hopefully covered by TODOs

This commit is contained in:
Adam Magnusson 2025-04-02 17:26:51 +02:00
parent 421ed1c006
commit b3a2c4e34a
2 changed files with 45 additions and 35 deletions

View File

@ -130,7 +130,7 @@ begin
if PACKET_TYPE = COMMAND then -- TODO Make this a real type and variable if PACKET_TYPE = COMMAND then -- TODO Make this a real type and variable
next_rx_state <= CMD; next_rx_state <= CMD;
elsif PACKET_TYPE = RESPONSE then elsif PACKET_TYPE = RESPONSE then
next_rx_state <= RX_HEADER; next_rx_state <= RX_BODY;
else else
next_rx_state <= IDLE; next_rx_state <= IDLE;
end if; end if;
@ -146,21 +146,21 @@ begin
elsif st.curr_cmd = READ then elsif st.curr_cmd = READ then
next_rx_state <= GEN_ACCESS; next_rx_state <= GEN_ACCESS;
end if; end if;
when RX_HEADER => --when RX_HEADER =>
-- The header only takes one word (cycle) to transmit. ---- The header only takes one word (cycle) to transmit.
-- Continue to awaiting response directly afterwards. ---- Continue to awaiting response directly afterwards.
if st.curr_cmd = READ_ADD then -- if st.curr_cmd = READ_ADD then
next_rx_state <= ADDR1; -- next_rx_state <= ADDR1;
else -- else
next_rx_state <= RX_RESPONSE; -- next_rx_state <= RX_RESPONSE;
end if; -- end if;
when RX_RESPONSE => --when RX_RESPONSE =>
-- Wait for read response. ---- Wait for read response.
if curr_response = READ_RESPONSE then -- if curr_response = READ_RESPONSE then
next_rx_state <= RX_BODY; -- next_rx_state <= RX_BODY;
else -- else
next_rx_state <= RX_RESPONSE; -- next_rx_state <= RX_RESPONSE;
end if; -- end if;
when RX_BODY => when RX_BODY =>
-- Here we want to stay in RX_BODY for the duration of a packet. -- Here we want to stay in RX_BODY for the duration of a packet.
if st.read_stage = 0 then if st.read_stage = 0 then
@ -176,34 +176,34 @@ begin
when ADDR3 => when ADDR3 =>
next_rx_state <= ADDR4; next_rx_state <= ADDR4;
when ADDR4 => when ADDR4 =>
-- TODO Unsure about this case. Should we enter RX_RESPONSE here? -- TODO this should probably not be dependant on state's instruction
if st.curr_cmd = WRITE or st.curr_cmd = WRITE_ADD then if st.curr_cmd = WRITE or st.curr_cmd = WRITE_ADD then
next_rx_state <= PAYLOAD; next_rx_state <= PAYLOAD;
else else
next_rx_state <= RX_RESPONSE; next_rx_state <= RX_BODY;
end if; end if;
end case; end case;
--- Next State Assignment Of TX FSM --- --- Next State Assignment Of TX FSM ---
case st.curr_tx_state is case st.curr_tx_state is
when IDLE => when IDLE =>
-- Do we have a command, if so enter command state.
if st.curr_cmd = READ_ADD or st.curr_cmd = READ or if st.curr_cmd = READ_ADD or st.curr_cmd = READ or
st.curr_cmd = WRITE_ADD or st.curr_cmd = WRITE then st.curr_cmd = WRITE_ADD or st.curr_cmd = WRITE then
next_tx_state <= CMD; next_tx_state <= TX_HEADER;
-- Otherwise we are ready to send a response to a read.
elsif RESPONSE_READY then -- TODO define RESPONSE_READY elsif RESPONSE_READY then -- TODO define RESPONSE_READY
next_tx_state <= RESPONSE; next_tx_state <= RESPONSE;
else else
next_tx_state <= IDLE; next_tx_state <= IDLE;
end if; end if;
when CMD =>
if st.curr_cmd = WRITE_ADD then
next_tx_state <= TX_HEADER;
elsif st.curr_cmd = WRITE then
next_tx_state <= WRITE;
elsif st.curr_cmd = READ or st.curr_cmd = READ_ADD then
next_tx_state <= RX_HEADER;
end if;
when RESPONSE => when RESPONSE =>
-- TODO consider whether this should be moved to TX_BODY
if MORE_RESPONSE then
next_tx_state <= RESPONSE;
else
next_tx_state <= IDLE;
end if;
when TX_HEADER => when TX_HEADER =>
-- The header only takes one word (cycle) to transmit. -- The header only takes one word (cycle) to transmit.
-- Continue to body or address directly afterwards. -- Continue to body or address directly afterwards.
@ -220,6 +220,7 @@ begin
next_tx_state <= TX_BODY; next_tx_state <= TX_BODY;
end if; end if;
when TX_ACK => when TX_ACK =>
-- TODO move this to rx FSM
-- Wait for write acknowledgement. -- Wait for write acknowledgement.
if curr_response = WRITE_ACK then if curr_response = WRITE_ACK then
next_tx_state <= IDLE; next_tx_state <= IDLE;
@ -237,7 +238,16 @@ begin
if st.curr_cmd = WRITE or st.curr_cmd = WRITE_ADD then if st.curr_cmd = WRITE or st.curr_cmd = WRITE_ADD then
next_tx_state <= TX_BODY; next_tx_state <= TX_BODY;
else else
next_tx_state <= RX_RESPONSE; -- If it is a read instruction we wait for response.
-- TODO separate read from NO_OP and P_ERR
next_tx_state <= AWAIT;
end if;
when AWAIT =>
-- Wait for RX FSM to get a response
if st.curr_rx_state = RX_BODY and st.read_stage = 0 then
next_tx_state <= IDLE;
else
next_tx_state <= AWAIT;
end if; end if;
end case; end case;
@ -256,7 +266,7 @@ begin
else else
end if; end if;
when TX_HEADER => when TX_HEADER =>
if st.curr_cmd = WRITE_ADD then if st.curr_cmd = WRITE_ADD or st.curr_cmd = READ_ADD then
socbridge_driver_to_ext_data_cmd := st.curr_addr(7 downto 0); socbridge_driver_to_ext_data_cmd := st.curr_addr(7 downto 0);
else else
socbridge_driver_to_ext_data_cmd := ip_to_socbridge_driver.payload; socbridge_driver_to_ext_data_cmd := ip_to_socbridge_driver.payload;

View File

@ -22,7 +22,7 @@ package socbridge_driver_tb_pkg is
type tx_state_t is type tx_state_t is
(IDLE, ADDR1, ADDR2, ADDR3, ADDR4, (IDLE, ADDR1, ADDR2, ADDR3, ADDR4,
CMD, RESPONSE, READ, WRITE, PAYLOAD, CMD, RESPONSE, READ, WRITE, PAYLOAD, AWAIT,
TX_HEADER, TX_BODY, TX_ACK); TX_HEADER, TX_BODY, TX_ACK);
--- TRANSLATOR --- --- TRANSLATOR ---
type translator_state_t is (IDLE, SEND, SEND_ACCEPTED, AWAIT); type translator_state_t is (IDLE, SEND, SEND_ACCEPTED, AWAIT);