diff --git a/src/control_socbridge_merge/control_socbridge_tb.vhd b/src/control_socbridge_merge/control_socbridge_tb.vhd index 83afbb6..634c7c0 100644 --- a/src/control_socbridge_merge/control_socbridge_tb.vhd +++ b/src/control_socbridge_merge/control_socbridge_tb.vhd @@ -1,11 +1,11 @@ library IEEE; use IEEE.std_logic_1164.all; use IEEE.NUMERIC_STD.all; -library ganimede; -use ganimede.io_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; library gan_socbridge; use gan_socbridge.socbridge_driver_pkg.all; -library controller; +library gan_controller; entity control_socbridge_tb is end entity control_socbridge_tb; diff --git a/src/controller/control_unit.vhd b/src/controller/control_unit.vhd index ce20432..8f68dad 100644 --- a/src/controller/control_unit.vhd +++ b/src/controller/control_unit.vhd @@ -1,8 +1,8 @@ library IEEE; use IEEE.std_logic_1164.all; use IEEE.MATH_REAL.all; -library ganimede; -use ganimede.io_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; entity control_unit is diff --git a/src/controller/control_unit_tb.vhd b/src/controller/control_unit_tb.vhd index 2c1c072..28d5eaa 100644 --- a/src/controller/control_unit_tb.vhd +++ b/src/controller/control_unit_tb.vhd @@ -2,9 +2,9 @@ library IEEE; use IEEE.std_logic_1164.all; use IEEE.MATH_REAL.all; use IEEE.numeric_std.all; -library ganimede; -use ganimede.io_types.all; -library controller; +library gan_ganimede; +use gan_ganimede.io_types.all; +library gan_controller; entity control_unit_tb is end entity control_unit_tb; @@ -36,7 +36,7 @@ begin wait; end process clock_proc; - control_unit_inst: entity controller.control_unit + control_unit_inst: entity gan_controller.control_unit port map( clk => clock, rst => reset, diff --git a/src/ganimede/ganimede.vhd b/src/ganimede/ganimede.vhd index b6cf699..7c09d91 100644 --- a/src/ganimede/ganimede.vhd +++ b/src/ganimede/ganimede.vhd @@ -1,10 +1,10 @@ library IEEE; use IEEE.std_logic_1164.all; -library ganimede; -use ganimede.io_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; library gan_socbridge; use gan_socbridge.socbridge_driver_pkg.all; -library controller; +library gan_controller; entity ganimede_toplevel is port ( @@ -29,24 +29,11 @@ architecture rtl of ganimede_toplevel is --signal gan_socbridge_is_full_in : std_logic; --signal gan_socbridge_is_full_out : std_logic; - --- COMPONENT DECLERATIONS --- - --component fifo is - -- generic( - -- WIDTH : positive; - -- DEPTH : positive - -- ); - -- port( - -- clk, reset, read_enable, write_enable : in std_logic; - -- is_full, is_empty : out std_logic; - -- data_in : in std_logic_vector(WIDTH - 1 downto 0); - -- data_out : out std_logic_vector(WIDTH - 1 downto 0) - -- ); - --end component; begin --- CONNECT EXTERNAL SIGNALS TO INTERNAL CONNECTIONS --- --- DRIVER INSTANTIATION --- - socbridge_inst: entity gan_socbridge.socbridge_driver + socbridge_driver_inst: entity gan_socbridge.socbridge_driver port map( clk => clk, rst => rst, @@ -58,12 +45,12 @@ begin socbridge_driver_to_ip => ganimede_to_ip.socbridge ); - controller_unit_inst: entity controller.control_unit + controller_inst: entity gan_controller.control_unit port map( clk => clk, rst => rst, - manager_to_controller => manager_to_ganimede, - controller_to_manager => ganimede_to_manager, + manager_to_controller => manager_to_ganimede, + controller_to_manager => ganimede_to_manager, drivers_to_controller => drivers_to_controller, controller_to_drivers => controller_to_drivers ); diff --git a/src/ganimede/ganimede_tb.vhd b/src/ganimede/ganimede_tb.vhd index 64e5c27..243115c 100644 --- a/src/ganimede/ganimede_tb.vhd +++ b/src/ganimede/ganimede_tb.vhd @@ -1,11 +1,11 @@ library IEEE; use IEEE.std_logic_1164.all; use IEEE.NUMERIC_STD.all; -library ganimede; -use ganimede.io_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; library gan_socbridge; use gan_socbridge.socbridge_driver_pkg.all; -library controller; +library gan_controller; entity ganimede_tb is end entity ganimede_tb; @@ -15,7 +15,7 @@ architecture tb of ganimede_tb is constant CLK_PERIOD : Time := 10 ns; constant SIMULATION_CYCLE_COUNT : integer := 2000; signal clk, rst : std_logic := '0'; - signal controller_to_socbridge_driver_cmd : command_t; + signal controller_to_socbridge_driver_cmd : instruction_command_t; signal controller_to_socbridge_driver_address : std_logic_vector(31 downto 0); signal cmd_size : positive; signal ext_to_ganimede : ext_to_ganimede_t := (socbridge => ( @@ -24,8 +24,8 @@ architecture tb of ganimede_tb is )); signal ganimede_to_ext : ganimede_to_ext_t; signal ganimede_to_ip : ganimede_to_ip_t; - signal ganimede_to_cpu : controller_to_cpu_t; - signal cpu_to_ganimede : cpu_to_controller_t := ( + signal ganimede_to_manager : controller_to_manager_t; + signal manager_to_ganimede : manager_to_controller_t := ( driver_id => (others => '0'), address => (others => '0'), seq_mem_access_count => 0, @@ -36,14 +36,14 @@ architecture tb of ganimede_tb is write_enable_out => '0', is_full_in => '0' )); - signal cpu_to_controller: cpu_to_controller_t := ( + signal manager_to_controller: manager_to_controller_t := ( driver_id => (others => '0'), address => (others => '0'), seq_mem_access_count => 0, cmd => "00" ); signal drivers_to_controller: drivers_to_controller_t := (socbridge => (is_active => '0')); - signal controller_to_cpu: controller_to_cpu_t; + signal controller_to_manager: controller_to_manager_t; signal controller_to_drivers: controller_to_drivers_t; signal curr_word : std_logic_vector(ext_to_ganimede.socbridge.payload'length - 1 downto 0); @@ -87,8 +87,8 @@ begin port map( clk => clk, rst => rst, - cpu_to_ganimede => cpu_to_ganimede, - ganimede_to_cpu => ganimede_to_cpu, + manager_to_ganimede => manager_to_ganimede, + ganimede_to_manager => ganimede_to_manager, ext_to_ganimede => ext_to_ganimede, ganimede_to_ext => ganimede_to_ext, ip_to_ganimede => ip_to_ganimede, @@ -109,36 +109,36 @@ begin begin report "Starting Simulation Stimulus!"; rst <= '1'; - cpu_to_controller.address <= (others => '0'); - cpu_to_controller.cmd <= "00"; - cpu_to_controller.driver_id <= "1"; - cpu_to_controller.seq_mem_access_count <= 256; + manager_to_controller.address <= (others => '0'); + manager_to_controller.cmd <= "00"; + manager_to_controller.driver_id <= "1"; + manager_to_controller.seq_mem_access_count <= 256; wait for 3 * CLK_PERIOD; report "Reset grace period ended, starting stimulus..."; rst <= '0'; - cpu_to_controller.address <= x"FA0FA0FA"; - cpu_to_controller.cmd <= "01"; + manager_to_controller.address <= x"FA0FA0FA"; + manager_to_controller.cmd <= "01"; wait until drivers_to_controller.socbridge.is_active = '1'; report "Task received in driver, awaiting completion..."; - cpu_to_controller.address <= (others => '0'); - cpu_to_controller.cmd <= "00"; + manager_to_controller.address <= (others => '0'); + manager_to_controller.cmd <= "00"; wait until drivers_to_controller.socbridge.is_active = '0'; wait for CLK_PERIOD; report "Task completed in driver, sending next task..."; - cpu_to_controller.address <= x"FA0FA0FA"; - cpu_to_controller.cmd <= "10"; + manager_to_controller.address <= x"FA0FA0FA"; + manager_to_controller.cmd <= "10"; wait for CLK_PERIOD; wait until drivers_to_controller.socbridge.is_active = '1'; report "Task received in driver, awaiting completion..."; - cpu_to_controller.address <= (others => '0'); - cpu_to_controller.cmd <= "00"; + manager_to_controller.address <= (others => '0'); + manager_to_controller.cmd <= "00"; wait until drivers_to_controller.socbridge.is_active = '0'; wait for CLK_PERIOD; report "Task completed in driver, ending simulation stimulus"; - cpu_to_controller.address <= (others => '0'); - cpu_to_controller.cmd <= "00"; - cpu_to_controller.driver_id <= "0"; - cpu_to_controller.seq_mem_access_count <= 0; + manager_to_controller.address <= (others => '0'); + manager_to_controller.cmd <= "00"; + manager_to_controller.driver_id <= "0"; + manager_to_controller.seq_mem_access_count <= 0; wait; end process stimulus_proc; diff --git a/src/gantry.toml b/src/gantry.toml index 77ce3f3..c650fd2 100644 --- a/src/gantry.toml +++ b/src/gantry.toml @@ -8,19 +8,19 @@ version = "0.0.1" vhdl-version = "93c" path = "socbridge" -[libraries.manager] +[libraries.gan_manager] vhdl-version = "93c" path = "manager" -[libraries.ganimede] +[libraries.gan_ganimede] vhdl-version = "93c" path = "ganimede" -[libraries.controller] +[libraries.gan_controller] vhdl-version = "93c" path = "controller" -[libraries.testbenches] +[libraries.gan_testbenches] vhdl-version = "93c" path = "control_socbridge_merge" diff --git a/src/manager/management_unit.vhd b/src/manager/management_unit.vhd index 49df662..acbabd1 100644 --- a/src/manager/management_unit.vhd +++ b/src/manager/management_unit.vhd @@ -2,10 +2,10 @@ library IEEE; use IEEE.std_logic_1164.all; use IEEE.MATH_REAL.all; use ieee.numeric_std.all; -library manager; -use manager.management_types.all; -library ganimede; -use ganimede.io_types.all; +library gan_manager; +use gan_manager.management_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; entity management_unit is port ( diff --git a/src/manager/management_unit_pkg.vhd b/src/manager/management_unit_pkg.vhd index 1981d0e..e79f167 100644 --- a/src/manager/management_unit_pkg.vhd +++ b/src/manager/management_unit_pkg.vhd @@ -1,8 +1,8 @@ library IEEE; use IEEE.std_logic_1164.all; use IEEE.MATH_REAL.all; -library ganimede; -use ganimede.io_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; package management_types is constant WORD_SIZE : natural := 32; diff --git a/src/manager/management_unit_tb.vhd b/src/manager/management_unit_tb.vhd index dd91dd2..4dbee7d 100644 --- a/src/manager/management_unit_tb.vhd +++ b/src/manager/management_unit_tb.vhd @@ -2,10 +2,10 @@ library IEEE; use IEEE.std_logic_1164.all; use IEEE.MATH_REAL.all; use IEEE.numeric_std.all; -library ganimede; -use ganimede.io_types.all; -library manager; -use manager.management_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; +library gan_manager; +use gan_manager.management_types.all; entity management_unit_tb is end entity management_unit_tb; @@ -48,7 +48,7 @@ begin wait; end process clock_proc; - management_unit_inst: entity manager.management_unit + management_unit_inst: entity gan_manager.management_unit port map( clk => clk, rst => rst, diff --git a/src/socbridge/socbridge_driver.vhd b/src/socbridge/socbridge_driver.vhd index a58b8e3..3a9b790 100644 --- a/src/socbridge/socbridge_driver.vhd +++ b/src/socbridge/socbridge_driver.vhd @@ -1,8 +1,8 @@ library IEEE; use IEEE.std_logic_1164.all; use IEEE.NUMERIC_STD.all; -library ganimede; -use ganimede.io_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; library gan_socbridge; use gan_socbridge.socbridge_driver_pkg.all; diff --git a/src/socbridge/socbridge_driver_pkg.vhd b/src/socbridge/socbridge_driver_pkg.vhd index 28769cf..7122115 100644 --- a/src/socbridge/socbridge_driver_pkg.vhd +++ b/src/socbridge/socbridge_driver_pkg.vhd @@ -2,8 +2,8 @@ library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_std.all; use IEEE.MATH_REAL.all; -library ganimede; -use ganimede.io_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; package socbridge_driver_pkg is diff --git a/src/socbridge/socbridge_driver_tb.vhd b/src/socbridge/socbridge_driver_tb.vhd index 64640d7..39e425a 100644 --- a/src/socbridge/socbridge_driver_tb.vhd +++ b/src/socbridge/socbridge_driver_tb.vhd @@ -2,10 +2,8 @@ library IEEE; use IEEE.std_logic_1164.all; use ieee.numeric_std.all; use IEEE.MATH_REAL.all; -library work; -use work.socbridge_driver_pkg.all; -library ganimede; -use ganimede.io_types.all; +library gan_ganimede; +use gan_ganimede.io_types.all; library gan_socbridge; diff --git a/src/vhdl_ls.toml b/src/vhdl_ls.toml index c460396..9a25589 100644 --- a/src/vhdl_ls.toml +++ b/src/vhdl_ls.toml @@ -2,7 +2,7 @@ standard = "1993" # File names are either absolute or relative to the parent folder of the vhdl_ls.toml file [libraries] -ganimede.files = [ +gan_ganimede.files = [ 'ganimede/io_type_pkg.vhd', 'ganimede/ganimede.vhd' ] @@ -10,10 +10,10 @@ gan_socbridge.files = [ 'socbridge/*.vhd' ] -controller.files = [ +gan_controller.files = [ 'controller/*.vhd', ] -manager.files = [ +gan_manager.files = [ 'manager/*.vhd', ] grlib.files = [