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example library package assuming vhdl08. Can be chagned to older ver if needed

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This commit is contained in:
Erik Örtenberg 2025-02-17 12:45:02 +01:00
parent 327ce30d16
commit c3ccfd03ba
2 changed files with 67 additions and 20 deletions
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75
src/io_type_pkg.vhd
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@ -1,22 +1,67 @@
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.MATH_REAL.all;
package io_types is
type interface_def_t is record
name: string (1 to 20);
payload_width, control_width: natural;
end record interface_def_t;
--- STANDARD TYPES ---
type ext_protocol_impl_t is record
payload, control: STD_LOGIC_VECTOR;
end record ext_protocol_impl_t;
type int_protocol_impl_t is record
payload : STD_LOGIC_VECTOR;
-- ADD MORE STUFF WHEN WE HAVE DECIDED UPON DRIVER INTERFACE
end record int_protocol_impl_t;
type ext_protocol_def_t is record
name: string (1 to 20);
payload_width: natural;
control_width_in, control_width_out: natural;
end record ext_protocol_def_t;
type interface_inst_t is record
socbridge: ext_protocol_def_t;
spi: ext_protocol_def_t;
end record interface_inst_t;
--- PROTOCOL INFORMATION ---
constant interface_inst : interface_inst_t := (
("SoCBridge ", 8, 2, 2),
("SPI ", 1, 3, 3)
);
--- AUTOGENERATED TYPES ---
type ext_interface_in_t is record
socbridge : ext_protocol_impl_t(
payload(interface_inst.socbridge.payload_width - 1 downto 0),
control(interface_inst.socbridge.control_width_in - 1 downto 0));
spi : ext_protocol_impl_t(
payload(interface_inst.spi.payload_width - 1 downto 0),
control(interface_inst.spi.control_width_in - 1 downto 0));
end record ext_interface_in_t;
type ext_interface_out_t is record
socbridge : ext_protocol_impl_t(
payload(interface_inst.socbridge.payload_width - 1 downto 0),
control(interface_inst.socbridge.control_width_out - 1 downto 0));
spi : ext_protocol_impl_t(
payload(interface_inst.spi.payload_width - 1 downto 0),
control(interface_inst.spi.control_width_out - 1 downto 0));
end record ext_interface_out_t;
type int_interface_in_t is record
socbridge : int_protocol_impl_t(
payload(interface_inst.socbridge.payload_width - 1 downto 0));
spi : int_protocol_impl_t(
payload(interface_inst.spi.payload_width - 1 downto 0));
end record int_interface_in_t;
type int_interface_out_t is record
socbridge : int_protocol_impl_t(
payload(interface_inst.socbridge.payload_width - 1 downto 0));
spi : int_protocol_impl_t(
payload(interface_inst.spi.payload_width - 1 downto 0));
end record int_interface_out_t;
type interface_arr_t is array (natural range <>) of interface_def_t;
constant interface_arr : interface_arr_t := (
0 => ("SoCBridge x ", 8, 2),
1 => ("SoCBridge x ", 8, 2),
2 => ("SoCBridge x ", 8, 2),
3 => ("SoCBridge x ", 8, 2),
4 => ("SoCBridge x ", 8, 2),
5 => ("SoCBridge x ", 8, 2)
);
end package io_types;

12
src/test.vhd
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@ -4,20 +4,22 @@ use work.io_types.all;
entity test is
port (
t : in interface_arr_t(0 to interface_arr'length - 1)
ext_interface_in : in ext_interface_in_t;
ext_interface_out : out ext_interface_out_t
);
end entity test;
architecture rtl of test is
signal int_interface_in : int_interface_in_t;
signal int_interface_out : int_interface_out_t;
begin
proc_name: process
begin
for x in 0 to (interface_arr'length - 1) loop
report interface_arr(x).name ;
end loop;
report "Hello";
report integer'image(ext_interface_in.socbridge.payload'length);
report integer'image(ext_interface_in.spi.payload'length);
wait;
end process proc_name;