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started refactoring signal names

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This commit is contained in:
Adam Magnusson 2025-03-12 16:05:50 +01:00
parent 9979b7b6dd
commit dba8b1a86d
3 changed files with 65 additions and 65 deletions
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66
src/control_socbridge_merge/control_socbridge_tb.vhd
View File

@ -29,15 +29,15 @@ architecture tb of control_socbridge_tb is
write_enable_out => '0',
is_full_in => '0'
);
signal ext_control_input: ext_control_unit_in_t := (
signal cpu_to_controller: cpu_to_controller_t := (
driver_id => (others => '0'),
address => (others => '0'),
seq_mem_access_count => 0,
cmd => "00"
);
signal int_control_input: int_control_unit_in_t := (active_driver => (others => '0'));
signal ext_control_output: ext_control_unit_out_t;
signal int_control_output: int_control_unit_out_t;
signal driver_to_controller: driver_to_control_t := (is_active => '0');
signal controller_to_cpu: controller_to_cpu_t;
signal controller_to_driver: controller_to_driver_t;
signal driver_to_control: driver_to_control_t;
signal control_to_driver: control_to_driver_t;
@ -95,18 +95,18 @@ begin
port map(
clk => clk,
rst => rst,
ext_control_in => ext_control_input,
ext_control_out => ext_control_output,
int_control_in => int_control_input,
int_control_out => int_control_output
cpu_to_controller => cpu_to_controller,
controller_to_cpu => controller_to_cpu,
driver_to_controller => driver_to_controller,
controller_to_driver => controller_to_driver
);
control_to_driver.address <= int_control_output.address;
control_to_driver.request <= int_control_output.driver_id(0);
control_to_driver.instruction <= int_control_output.instruction;
control_to_driver.seq_mem_access_count <= int_control_output.seq_mem_access_count;
control_to_driver.address <= controller_to_driver.address;
control_to_driver.request <= controller_to_driver.driver_id(0);
control_to_driver.instruction <= controller_to_driver.instruction;
control_to_driver.seq_mem_access_count <= controller_to_driver.seq_mem_access_count;
int_control_input.active_driver(0) <= driver_to_control.is_active;
driver_to_controller.active_driver(0) <= driver_to_control.is_active;
ext_socbridge_in.control(1) <= clk;
control_clock_proc: process
@ -122,36 +122,36 @@ begin
begin
report "Starting Simulation Stimulus!";
rst <= '1';
ext_control_input.address <= (others => '0');
ext_control_input.cmd <= "00";
ext_control_input.driver_id <= "1";
ext_control_input.seq_mem_access_count <= 256;
cpu_to_controller.address <= (others => '0');
cpu_to_controller.cmd <= "00";
cpu_to_controller.driver_id <= "1";
cpu_to_controller.seq_mem_access_count <= 256;
wait for 3 * CLK_PERIOD;
report "Reset grace period ended, starting stimulus...";
rst <= '0';
ext_control_input.address <= x"FA0FA0FA";
ext_control_input.cmd <= "01";
wait until int_control_input.active_driver(0) = '1';
cpu_to_controller.address <= x"FA0FA0FA";
cpu_to_controller.cmd <= "01";
wait until driver_to_controller.active_driver(0) = '1';
report "Task received in driver, awaiting completion...";
ext_control_input.address <= (others => '0');
ext_control_input.cmd <= "00";
wait until int_control_input.active_driver(0) = '0';
cpu_to_controller.address <= (others => '0');
cpu_to_controller.cmd <= "00";
wait until driver_to_controller.active_driver(0) = '0';
wait for CLK_PERIOD;
report "Task completed in driver, sending next task...";
ext_control_input.address <= x"FA0FA0FA";
ext_control_input.cmd <= "10";
cpu_to_controller.address <= x"FA0FA0FA";
cpu_to_controller.cmd <= "10";
wait for CLK_PERIOD;
wait until int_control_input.active_driver(0) = '1';
wait until driver_to_controller.active_driver(0) = '1';
report "Task received in driver, awaiting completion...";
ext_control_input.address <= (others => '0');
ext_control_input.cmd <= "00";
wait until int_control_input.active_driver(0) = '0';
cpu_to_controller.address <= (others => '0');
cpu_to_controller.cmd <= "00";
wait until driver_to_controller.active_driver(0) = '0';
wait for CLK_PERIOD;
report "Task completed in driver, ending simulation stimulus";
ext_control_input.address <= (others => '0');
ext_control_input.cmd <= "00";
ext_control_input.driver_id <= "0";
ext_control_input.seq_mem_access_count <= 0;
cpu_to_controller.address <= (others => '0');
cpu_to_controller.cmd <= "00";
cpu_to_controller.driver_id <= "0";
cpu_to_controller.seq_mem_access_count <= 0;
wait;
end process stimulus_proc;

30
src/controller/control_unit.vhd
View File

@ -8,10 +8,10 @@ entity control_unit is
port (
clk, rst : in std_logic;
ext_control_in : in ext_control_unit_in_t;
ext_control_out : out ext_control_unit_out_t;
int_control_in : in int_control_unit_in_t;
int_control_out : out int_control_unit_out_t
cpu_to_controller : in cpu_to_controller_t;
controller_to_cpu : out controller_to_cpu_t;
driver_to_controller : in driver_to_controller_t;
controller_to_driver : out controller_to_driver_t
);
end entity control_unit;
@ -31,17 +31,17 @@ architecture behave of control_unit is
begin
comb_proc: process(ext_control_in, int_control_in, state)
comb_proc: process(cpu_to_controller, driver_to_controller, state)
begin
ored := '0';
ready_reduction: for i in 0 to number_of_drivers - 1 loop
ored := ored or int_control_in.active_driver(i);
ored := ored or driver_to_controller.active_driver(i);
end loop ready_reduction;
int_control_out.driver_id <= state.curr_driver;
int_control_out.address <= state.address;
int_control_out.seq_mem_access_count <= state.seq_mem_access_count;
ext_control_out.ready <= state.ready;
int_control_out.instruction <= state.instruction;
controller_to_driver.driver_id <= state.curr_driver;
controller_to_driver.address <= state.address;
controller_to_driver.seq_mem_access_count <= state.seq_mem_access_count;
controller_to_cpu.ready <= state.ready;
controller_to_driver.instruction <= state.instruction;
end process comb_proc;
sync_proc: process(clk, state)
@ -56,10 +56,10 @@ begin
else
state.ready <= not ored;
if ored = '0' then
state.address <= ext_control_in.address;
state.seq_mem_access_count <= ext_control_in.seq_mem_access_count;
state.curr_driver <= ext_control_in.driver_id;
with ext_control_in.cmd select
state.address <= cpu_to_controller.address;
state.seq_mem_access_count <= cpu_to_controller.seq_mem_access_count;
state.curr_driver <= cpu_to_controller.driver_id;
with cpu_to_controller.cmd select
state.instruction <= WRITE when "01",
READ when "10",
NO_OP when others;

34
src/ganimede/io_type_pkg.vhd
View File

@ -24,38 +24,38 @@ package io_types is
end record interface_inst_t;
--- CONTROL UNIT ---
type ext_control_unit_in_t is record
type cpu_to_controller_t is record
driver_id: std_logic_vector(number_of_drivers - 1 downto 0);
address: std_logic_vector(address_width - 1 downto 0);
seq_mem_access_count: integer;
cmd: std_logic_vector(1 downto 0);
end record ext_control_unit_in_t;
end record cpu_to_controller_t;
type ext_control_unit_out_t is record
type controller_to_cpu_t is record
ready: std_logic;
end record ext_control_unit_out_t;
end record controller_to_cpu_t;
type int_control_unit_out_t is record
driver_id: std_logic_vector(number_of_drivers - 1 downto 0);
address: std_logic_vector(address_width - 1 downto 0);
seq_mem_access_count: integer;
instruction: instruction_command_t;
end record int_control_unit_out_t;
--type controller_to_driver_t is record
-- driver_id: std_logic_vector(number_of_drivers - 1 downto 0);
-- address: std_logic_vector(address_width - 1 downto 0);
-- seq_mem_access_count: integer;
-- instruction: instruction_command_t;
--end record controller_to_driver_t;
type int_control_unit_in_t is record
active_driver: std_logic_vector(number_of_drivers - 1 downto 0);
end record int_control_unit_in_t;
--type driver_to_controller_t is record
-- active_driver: std_logic_vector(number_of_drivers - 1 downto 0);
--end record driver_to_controller_t;
type driver_to_control_t is record
type driver_to_controller_t is record
is_active : std_logic;
end record driver_to_control_t;
end record driver_to_controller_t;
type control_to_driver_t is record
type controller_to_driver_t is record
request: std_logic;
address: std_logic_vector(address_width - 1 downto 0);
seq_mem_access_count: integer;
instruction: instruction_command_t;
end record control_to_driver_t;
end record controller_to_driver_t;
--- PROTOCOL INFORMATION ---
constant interface_inst : interface_inst_t := (