diff --git a/src/ganimede/ganimede.vhd b/src/ganimede/ganimede.vhd index 27cb49d..4e90692 100644 --- a/src/ganimede/ganimede.vhd +++ b/src/ganimede/ganimede.vhd @@ -10,6 +10,9 @@ use gan_manager.management_types.all; library gan_buffer; entity ganimede_toplevel is + generic ( + tech : integer + ); port ( clk : in std_logic; rst : in std_logic; @@ -44,6 +47,10 @@ begin ip_to_socbridge_driver.fifo <= buffer_to_socbridge_driver; ip_to_socbridge_driver.flush <= ip_to_ganimede.socbridge.flush; ganimede_to_ip_reset <= rst or ip_to_ganimede.socbridge.flush; + ganimede_to_ip.socbridge.used_slots <= 0; + ip_to_socbridge_driver.read_fifo.data <= (others => '0'); + ip_to_socbridge_driver.read_fifo.valid <= '0'; + ip_to_socbridge_driver.read_fifo.ready <= '0'; --- DRIVER INSTANTIATION --- socbridge_driver_inst: entity gan_socbridge.socbridge_driver generic map( @@ -85,8 +92,8 @@ begin fifo_buffer_to_ip_inst : entity gan_buffer.fifo_buffer generic map ( - buffer_size => buf_size - --tech => 60 + buffer_size => buf_size, + tech => tech ) port map( in_clk => socbridge_clk, @@ -103,8 +110,8 @@ begin fifo_buffer_from_ip_inst : entity gan_buffer.fifo_buffer generic map ( - buffer_size => buf_size --- tech => 60 + buffer_size => buf_size, + tech => tech ) port map( in_clk => clk, diff --git a/src/socbridge/socbridge_driver.vhd b/src/socbridge/socbridge_driver.vhd index c2fcdd1..b8b6731 100644 --- a/src/socbridge/socbridge_driver.vhd +++ b/src/socbridge/socbridge_driver.vhd @@ -49,10 +49,6 @@ architecture rtl of socbridge_driver is --- FSM COMMUNICATION --- --- MANAGEMENT COMMUNICATION --- begin - ext_to_socbridge_driver_rec.data <= ext_to_socbridge_driver.payload; - ext_to_socbridge_driver_rec.clk <= ext_to_socbridge_driver.control(1); - ext_to_socbridge_driver_rec.parity <= ext_to_socbridge_driver.control(0); - socbridge_clk <= ext_to_socbridge_driver_rec.clk; comb_proc: process(ext_to_socbridge_driver_rec, ip_to_socbridge_driver, controller_to_socbridge_driver, st, trans_st) @@ -63,6 +59,11 @@ begin begin -- DEFAULT VALUES -- Helpful Bindings -- + ext_to_socbridge_driver_rec.data <= ext_to_socbridge_driver.payload; + ext_to_socbridge_driver_rec.clk <= ext_to_socbridge_driver.control(1); + ext_to_socbridge_driver_rec.parity <= ext_to_socbridge_driver.control(0); + socbridge_clk <= ext_to_socbridge_driver_rec.clk; + socbridge_driver_to_ip.used_slots <= 0; next_rx_data_size <= 2 ** to_integer(unsigned(ext_to_socbridge_driver_rec.data(2 downto 0))); curr_response_bits := ext_to_socbridge_driver_rec.data(7 downto 3); -- Set helper var to current transaction seen at the input. @@ -263,26 +264,20 @@ begin end case; --- ### RX_STATE BASED OUTPUT ### --- socbridge_driver_to_manager.valid <= '0'; - socbridge_driver_to_manager.address <= (others => '0'); - socbridge_driver_to_manager.data <= (others => '0'); + socbridge_driver_to_manager.data <= st.manager_data; + socbridge_driver_to_manager.address <= st.manager_addr; socbridge_driver_to_ip.valid <= '0'; socbridge_driver_to_ip.data <= st.ext_to_socbridge_driver_reg.data; case st.rx_state is when RX_W_BODY => if st.rx_stage mod 4 = 0 and st.rx_stage /= st.rx_data_size then - socbridge_driver_to_manager.data <= st.manager_data; - socbridge_driver_to_manager.address <= st.manager_addr; socbridge_driver_to_manager.valid <= '1'; end if; when RX_R_BODY => socbridge_driver_to_ip.valid <= '1'; when RX_AWAIT => if st.rx_transaction = WRITE or st.rx_transaction = WRITE_ADD then - socbridge_driver_to_manager.data <= st.manager_data; - socbridge_driver_to_manager.address <= st.manager_addr; socbridge_driver_to_manager.valid <= '1'; - else - socbridge_driver_to_manager.address <= st.manager_addr; end if; when others => end case;