added grlib support (socbridge needs to be recompiled)

This commit is contained in:
Erik Örtenberg 2025-04-03 16:14:26 +02:00
parent c6c5d2d7fc
commit ffa2ee768c
9 changed files with 218 additions and 41 deletions

1
.gitignore vendored
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@ -1,3 +1,4 @@
**/wave
**/work
**/syn
scripts/ghdl

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@ -1,4 +0,0 @@
#!/bin/bash
VARS="$@"
COMMAND="ghdl $VARS"
docker run -it -v .:/src -w /src ghdl/ghdl:5.0.0-dev-gcc-ubuntu-24.04 bash -c "$COMMAND"

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@ -1,6 +0,0 @@
#!/bin/bash
source /gsl/cad/modules/init/bash
module add /gsl/cad/modules/modulefiles/nanoxplore/nxdesignsuite/24.3.0.0
nxpython $@

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@ -3,8 +3,8 @@ use IEEE.std_logic_1164.all;
use IEEE.NUMERIC_STD.all;
library ganimede;
use ganimede.io_types.all;
library socbridge;
use socbridge.socbridge_driver_tb_pkg.all;
library gan_socbridge;
use gan_socbridge.socbridge_driver_tb_pkg.all;
library controller;
entity control_socbridge_tb is

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@ -2,8 +2,8 @@ library IEEE;
use IEEE.std_logic_1164.all;
library ganimede;
use ganimede.io_types.all;
library socbridge;
use socbridge.socbridge_driver_tb_pkg.all;
library gan_socbridge;
use gan_socbridge.socbridge_driver_tb_pkg.all;
library controller;
entity ganimede_toplevel is

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@ -5,17 +5,181 @@ email = ""
version = "0.0.1"
[libraries.socbridge]
vhdl-version = "93"
vhdl-version = "93c"
path = "socbridge"
[libraries.ganimede]
vhdl-version = "93"
vhdl-version = "93c"
path = "ganimede"
[libraries.controller]
vhdl-version = "93"
vhdl-version = "93c"
path = "controller"
[libraries.control_socbridge_merge]
vhdl-version = "93"
[libraries.testbenches]
vhdl-version = "93c"
path = "control_socbridge_merge"
[libraries.gaisler]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/gaisler"
[libraries.grlib]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/grlib"
[libraries.gr_socbridge_tb]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/verification/socbridge"
[libraries.techmap]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/gencomp"
[libraries.alltech]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/alltech"
[libraries.altera_mf]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/altera_mf"
[libraries.apa]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/apa"
[libraries.artisan]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/artisan"
[libraries.atc18]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/atc18"
[libraries.axcelerator]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/axcelerator"
[libraries.cust1]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/cust1"
[libraries.cycloneiii]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/cycloneiii"
[libraries.dware]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/dware"
[libraries.ec]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/ec"
[libraries.eclipsee]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/eclipsee"
[libraries.fusion]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/fusion"
[libraries.inferred]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/inferred"
[libraries.grdware]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/grdware"
[libraries.maps]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/maps"
[libraries.nx]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/nx"
[libraries.polarfire]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/polarfire"
[libraries.nexus]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/nexus"
[libraries.proasic3]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/proasic3"
[libraries.proasic3e]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/proasic3e"
[libraries.proasic3l]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/proasic3l"
[libraries.saed32]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/saed32"
[libraries.smartfusion2]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/smartfusion2"
[libraries.stratixiii]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/stratixiii"
[libraries.stratixii]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/stratixii"
[libraries.stratixiv]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/stratixiv"
[libraries.stratixv]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/stratixv"
[libraries.umc18]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/umc18"
[libraries.unisim]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/unisim"
[libraries.virage90]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/virage90"
[libraries.virage]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/virage"
[libraries.virtex]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/virtex"
[libraries.virtex5]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/techmap/virtex5"
[libraries.opencores]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/opencores"
[libraries.eth]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/eth"
[libraries.micron]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/lib/micron"
[libraries.ahb2ahb]
vhdl-version = "93c"
path = "grlib-com-nx-2024.4-b4295/verification/ahb2ahb"

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@ -3,11 +3,14 @@ use IEEE.std_logic_1164.all;
use IEEE.NUMERIC_STD.all;
library ganimede;
use ganimede.io_types.all;
library socbridge;
use socbridge.socbridge_driver_tb_pkg.all;
library gan_socbridge;
use gan_socbridge.socbridge_driver_tb_pkg.all;
entity socbridge_driver is
generic(
MAX_PKT_SIZE : integer range 1 to 128 := 32
);
port(
clk : in std_logic;
rst : in std_logic;
@ -77,9 +80,6 @@ begin
begin
-- Outputs
socbridge_driver_to_ext <= create_io_type_out_from_ext_protocol(st.socbridge_driver_to_ext_reg);
with trans_st.curr_state select
socbridge_driver_to_controller.is_active <= '0' when IDLE,
'1' when others;
if curr_response_bits = "10000" then
next_rx_transaction := WRITE_ADD;
elsif curr_response_bits = "10100" then
@ -98,6 +98,12 @@ begin
next_rx_transaction := NO_OP;
end if;
if trans_st.curr_state = IDLE then
socbridge_driver_to_controller.is_active <= '0';
else
socbridge_driver_to_controller.is_active <= '1';
end if;
--- State Transition Diagram OUTDATED!! ---
--
--
@ -268,7 +274,7 @@ begin
end if;
when TX_HEADER =>
if st.curr_cmd = WRITE_ADD or st.curr_cmd = READ_ADD then
socbridge_driver_to_ext_data_cmd := st.curr_addr(7 downto 0);
socbridge_driver_to_ext_data_cmd := st.curr_addr(31 downto 24);
else
socbridge_driver_to_ext_data_cmd := ip_to_socbridge_driver.payload;
socbridge_driver_to_ip.is_full_out <= '0';
@ -283,18 +289,18 @@ begin
when TX_ACK =>
when RX_HEADER =>
if st.curr_cmd = READ_ADD then
socbridge_driver_to_ext_data_cmd := st.curr_addr(7 downto 0);
socbridge_driver_to_ext_data_cmd := st.curr_addr(31 downto 24);
end if;
when RX_RESPONSE =>
when RX_BODY =>
socbridge_driver_to_ip.payload <= st.ext_to_socbridge_driver_reg.data;
socbridge_driver_to_ip.write_enable_in <= '1';
when ADDR1 =>
socbridge_driver_to_ext_data_cmd := st.curr_addr(15 downto 8);
when ADDR2 =>
socbridge_driver_to_ext_data_cmd := st.curr_addr(23 downto 16);
when ADDR2 =>
socbridge_driver_to_ext_data_cmd := st.curr_addr(15 downto 8);
when ADDR3 =>
socbridge_driver_to_ext_data_cmd := st.curr_addr(31 downto 24);
socbridge_driver_to_ext_data_cmd := st.curr_addr(7 downto 0);
when ADDR4 =>
if st.curr_cmd = WRITE_ADD then
socbridge_driver_to_ip.is_full_out <= '0';
@ -358,8 +364,8 @@ begin
end if;
end if;
if trans_st.curr_inst.seq_mem_access_count > 128 then
next_cmd_size <= 128;
if trans_st.curr_inst.seq_mem_access_count > MAX_PKT_SIZE then
next_cmd_size <= MAX_PKT_SIZE;
elsif trans_st.curr_inst.seq_mem_access_count > 0 then
next_cmd_size <= trans_st.curr_inst.seq_mem_access_count;
else
@ -442,7 +448,7 @@ begin
trans_st.is_first_word <= '1';
when SEND =>
when SEND_ACCEPTED =>
trans_st.curr_inst.seq_mem_access_count <= trans_st.curr_inst.seq_mem_access_count - 128;
trans_st.curr_inst.seq_mem_access_count <= trans_st.curr_inst.seq_mem_access_count - MAX_PKT_SIZE;
when AWAIT =>
if trans_st.curr_inst.seq_mem_access_count <= 0 and st.curr_state = IDLE then
trans_st.curr_inst.request <= '0';

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@ -110,18 +110,25 @@ package body socbridge_driver_tb_pkg is
val.control(0) := input.parity;
return val;
end function;
pure function get_cmd_bits(command : command_t)
return std_logic_vector is
variable val : std_logic_vector(4 downto 0);
begin
with command select
val := "00000" when NO_OP,
"10000" when WRITE_ADD,
"10100" when WRITE,
"11000" when READ_ADD,
"11100" when READ,
"01001" when P_ERR,
"11111" when others;
val := "11111";
if command = NO_OP then
val := "00000";
elsif command = WRITE_ADD then
val := "10000";
elsif command = WRITE then
val := "10100";
elsif command = READ_ADD then
val := "11000";
elsif command = READ then
val := "11100";
elsif command = P_ERR then
val := "01001";
end if;
return val;
end function;

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@ -6,13 +6,22 @@ ganimede.files = [
'ganimede/io_type_pkg.vhd',
'ganimede/ganimede.vhd'
]
socbridge.files = [
gan_socbridge.files = [
'socbridge/*.vhd'
]
controller.files = [
'controller/*.vhd',
]
grlib.files = [
'grlib-com-nx-2024.4-b4295/lib/grlib/**/*.vhd',
]
techmap.files = [
'grlib-com-nx-2024.4-b4295/lib/techmap/gencomp/**/*.vhd',
]
gaisler.files = [
'grlib-com-nx-2024.4-b4295/lib/gaisler/**/*.vhd',
]
[lint]
unused = 'error' # Upgrade the 'unused' diagnostic to the 'error' severity