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899877d47f
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594d295ae2
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.MATH_REAL.all;
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package io_types is
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--- STANDARD TYPES ---
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type ext_protocol_impl_t is record
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payload, control: STD_LOGIC_VECTOR;
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end record ext_protocol_impl_t;
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type int_protocol_impl_t is record
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payload : STD_LOGIC_VECTOR;
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-- ADD MORE STUFF WHEN WE HAVE DECIDED UPON DRIVER INTERFACE
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end record int_protocol_impl_t;
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type ext_protocol_def_t is record
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name: string (1 to 20);
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payload_width: natural;
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control_width_in, control_width_out: natural;
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end record ext_protocol_def_t;
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type interface_inst_t is record
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socbridge: ext_protocol_def_t;
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spi: ext_protocol_def_t;
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end record interface_inst_t;
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--- PROTOCOL INFORMATION ---
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constant interface_inst : interface_inst_t := (
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("SoCBridge ", 8, 2, 2),
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("SPI ", 1, 3, 3)
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);
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--- AUTOGENERATED TYPES ---
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type ext_interface_in_t is record
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socbridge : ext_protocol_impl_t(
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payload(interface_inst.socbridge.payload_width - 1 downto 0),
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control(interface_inst.socbridge.control_width_in - 1 downto 0));
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spi : ext_protocol_impl_t(
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payload(interface_inst.spi.payload_width - 1 downto 0),
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control(interface_inst.spi.control_width_in - 1 downto 0));
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end record ext_interface_in_t;
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type ext_interface_out_t is record
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socbridge : ext_protocol_impl_t(
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payload(interface_inst.socbridge.payload_width - 1 downto 0),
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control(interface_inst.socbridge.control_width_out - 1 downto 0));
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spi : ext_protocol_impl_t(
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payload(interface_inst.spi.payload_width - 1 downto 0),
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control(interface_inst.spi.control_width_out - 1 downto 0));
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end record ext_interface_out_t;
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type int_interface_in_t is record
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socbridge : int_protocol_impl_t(
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payload(interface_inst.socbridge.payload_width - 1 downto 0));
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spi : int_protocol_impl_t(
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payload(interface_inst.spi.payload_width - 1 downto 0));
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end record int_interface_in_t;
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type int_interface_out_t is record
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socbridge : int_protocol_impl_t(
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payload(interface_inst.socbridge.payload_width - 1 downto 0));
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spi : int_protocol_impl_t(
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payload(interface_inst.spi.payload_width - 1 downto 0));
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end record int_interface_out_t;
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end package io_types;
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27
src/test.vhd
27
src/test.vhd
@ -1,27 +0,0 @@
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library IEEE;
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library work;
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use work.io_types.all;
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entity test is
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port (
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ext_interface_in : in ext_interface_in_t;
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ext_interface_out : out ext_interface_out_t
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);
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end entity test;
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architecture rtl of test is
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signal int_interface_in : int_interface_in_t;
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signal int_interface_out : int_interface_out_t;
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begin
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proc_name: process
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begin
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report "Hello";
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report integer'image(ext_interface_in.socbridge.payload'length);
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report integer'image(ext_interface_in.spi.payload'length);
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wait;
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end process proc_name;
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end architecture rtl;
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