kryddan/exjobb-public
1
0
Fork 0
Code Issues 2 Pull Requests Actions Packages Projects Releases Wiki Activity

ganimede-rework #20

Closed
kryddan wants to merge 25 commits from ganimede-rework into ganimede-single-issue
pull from: ganimede-rework
merge into: kryddan:ganimede-single-issue
Conversation 0 Commits 25 Files Changed 10 +2 -15
2 changed files with 2 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files
Showing only changes of commit 07150fe14a - Show all commits

15
src/socbridge/socbridge_driver.vhd
View File

@ -150,17 +150,6 @@ begin
else else
next_tx_state <= TX_W_BODY; next_tx_state <= TX_W_BODY;
end if; end if;
when TX_AWAIT =>
-- Wait for RX FSM to get a response
if (st.curr_tx_transaction = WRITE_ADD or st.curr_tx_transaction = WRITE)
and st.curr_rx_transaction = WRITE_ACK then
next_tx_state <= IDLE;
elsif (st.curr_tx_transaction = READ_ADD or st.curr_tx_transaction = READ)
and st.curr_rx_transaction = READ_RESPONSE and (st.rx_stage = 1 or next_tx_transaction = WRITE or next_tx_transaction = WRITE_ADD) then
next_tx_state <= IDLE;
else
next_tx_state <= TX_AWAIT;
end if;
end case; end case;
--- Next State Assignment Of RX FSM --- --- Next State Assignment Of RX FSM ---
case st.curr_rx_state is case st.curr_rx_state is
@ -260,7 +249,6 @@ begin
if st.tx_stage > 0 then if st.tx_stage > 0 then
local_next_data_out := st.manager_data((((st.tx_stage - 1) mod 4) + 1) * 8 - 1 downto ((((st.tx_stage - 1) mod 4) + 1) - 1) * 8); local_next_data_out := st.manager_data((((st.tx_stage - 1) mod 4) + 1) * 8 - 1 downto ((((st.tx_stage - 1) mod 4) + 1) - 1) * 8);
end if; end if;
when TX_AWAIT =>
when ADDR1 => when ADDR1 =>
local_next_data_out := st.curr_tx_addr(31 downto 24); local_next_data_out := st.curr_tx_addr(31 downto 24);
when ADDR2 => when ADDR2 =>
@ -421,7 +409,7 @@ begin
next_data_out <= local_next_data_out; next_data_out <= local_next_data_out;
end process comb_proc; end process comb_proc;
-- Process updating internal registers based on primary clock -- Process updating internal registers based on primary clock
seq_proc: process(ext_to_socbridge_driver_rec.clk, st.ext_to_socbridge_driver_reg.data, rst, clk) seq_proc: process(ext_to_socbridge_driver_rec.clk, rst, clk)
begin begin
if(rst = '1') then if(rst = '1') then
st.ext_to_socbridge_driver_reg.data <= (others => '0'); st.ext_to_socbridge_driver_reg.data <= (others => '0');
@ -553,7 +541,6 @@ begin
end if; end if;
when RX_AWAIT => when RX_AWAIT =>
st.manager_data <= manager_to_socbridge_driver.data; st.manager_data <= manager_to_socbridge_driver.data;
-- THIS DOESN'T WORK FOR LARGER THAN 4 BYTE ACCESSES, SHOULD BE FIXED BUT NOT NEEDED IF ONLY 4 BYTE ACCESSES ARRIVE
if st.curr_tx_transaction = READ_RESPONSE or st.curr_tx_transaction = WRITE_ACK then if st.curr_tx_transaction = READ_RESPONSE or st.curr_tx_transaction = WRITE_ACK then
if (st.curr_rx_transaction = READ or st.curr_rx_transaction = READ_ADD) and (st.tx_stage - 2) mod 4 = 0 then if (st.curr_rx_transaction = READ or st.curr_rx_transaction = READ_ADD) and (st.tx_stage - 2) mod 4 = 0 then
st.manager_addr <= std_logic_vector(to_unsigned(to_integer(unsigned(st.manager_addr) + 4), 32)); st.manager_addr <= std_logic_vector(to_unsigned(to_integer(unsigned(st.manager_addr) + 4), 32));

2
src/socbridge/socbridge_driver_pkg.vhd
View File

@ -18,7 +18,7 @@ package socbridge_driver_pkg is
RX_R_BODY, RX_HEADER, RX_W_BODY); RX_R_BODY, RX_HEADER, RX_W_BODY);
type tx_state_t is type tx_state_t is
(IDLE, ADDR1, ADDR2, ADDR3, ADDR4, TX_AWAIT, (IDLE, ADDR1, ADDR2, ADDR3, ADDR4,
TX_HEADER, TX_W_BODY, TX_R_BODY); TX_HEADER, TX_W_BODY, TX_R_BODY);
--- TRANSLATOR --- --- TRANSLATOR ---
type ctrl_inst_state_t is (IDLE, SEND, SEND_ACCEPTED, AWAIT); type ctrl_inst_state_t is (IDLE, SEND, SEND_ACCEPTED, AWAIT);