src/socbridge_driver.vhd

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+library IEEE;
+use IEEE.std_logic_1164.all;
+library work;
+use work.io_types.all;
+
+
+entity socbridge_driver is
+  port(
+    clk     : in std_logic;
+    reset   : in std_logic;
+    ext_in  : in ext_socbridge_in_t;
+    ext_out : out ext_socbridge_out_t;
+    int_in  : out int_socbridge_in_t;
+    int_out : in int_socbridge_out_t
+  );
+end entity socbridge_driver;
+
+architecture rtl of socbridge_driver is
+  
+
+begin
+  ext_out <= (payload => (others => '0'), control => (others => '0'));
+  int_in  <= (payload => (others => '0'), write_enable_in => '0', is_full_out =>'0');
+end architecture rtl;