library IEEE;
use IEEE.std_logic_1164.all;
library work;
use work.io_types.all;

entity ganimede is
  port (
    clk                 : in std_logic;
    reset               : in std_logic;
    ext_interface_in    : in ext_interface_in_t;
    ext_interface_out   : out ext_interface_out_t;
    int_interface_in    : in int_interface_in_t;
    int_interface_out   : out int_interface_out_t
  );
end entity ganimede;
architecture rtl of ganimede is
  --- SIGNAL DECLERATIONS ---
  signal gan_int_interface_in  : int_interface_in_t;
  signal gan_int_interface_out : int_interface_out_t;
  signal gan_ext_interface_in  : ext_interface_in_t;
  signal gan_ext_interface_out : ext_interface_out_t;

  --signal gan_socbridge_WE_in : std_logic;
  --signal gan_socbridge_WE_out : std_logic;
  --signal gan_socbridge_is_full_in : std_logic;
  --signal gan_socbridge_is_full_out : std_logic;
  
  --- COMPONENT DECLERATIONS ---
  --component fifo is 
  --  generic(
  --    WIDTH : positive;
  --    DEPTH : positive
  --  );
  --  port(
  --    clk, reset, read_enable, write_enable : in std_logic;
  --    is_full, is_empty                     : out std_logic;
  --    data_in      : in std_logic_vector(WIDTH - 1 downto 0);
  --    data_out     : out std_logic_vector(WIDTH - 1 downto 0)
  --  );
  --end component;

  component socbridge_driver is
    port(
      clk     : in std_logic;
      reset   : in std_logic;
      ext_in  : in ext_socbridge_in_t;
      ext_out : out ext_socbridge_out_t;
      int_in  : out int_socbridge_in_t;
      int_out : in int_socbridge_out_t
    );
  end component;

begin
  --- CONNECT EXTERNAL SIGNALS TO INTERNAL CONNECTIONS ---
  gan_int_interface_in  <= int_interface_in;
  int_interface_out     <= gan_int_interface_out;
  gan_ext_interface_in  <= ext_interface_in;
  ext_interface_out     <= gan_ext_interface_out;
  
  --- DRIVER INSTANTIATION ---
  socbridge_driver_inst: socbridge_driver
   port map(
      clk     => clk,
      reset   => reset,
      ext_in  => gan_ext_interface_in.socbridge,
      ext_out => gan_ext_interface_out.socbridge,
      int_in  => gan_int_interface_in.socbridge,
      int_out => gan_int_interface_out.socbridge
  );

  --- LATER WE ADD OPTIMIZATIONS HERE ---


end architecture rtl;