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Further tiny minimizations by storing aforementioned state in reserved bits in manager memory

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Adam 2025-05-21 19:49:06 +02:00
parent ac2aa8df19
commit 0dd3098c72
1 changed files with 7 additions and 18 deletions
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25
src/manager/management_unit.vhd
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@ -22,8 +22,6 @@ architecture rtl of management_unit is
signal manager_state : manager_state_t;
signal write_address : manager_word_t;
signal read_address : manager_word_t;
signal reading, writing : std_logic;
-- Address indexing whole words, not bytes
signal word_address : natural;
signal cmd : std_logic_vector(1 downto 0);
@ -68,9 +66,9 @@ seq_proc: process(clk)
begin
if rising_edge(clk) then
if rst = '1' then
manager_state <= manager_state_reset_val;
writing <= '0';
reading <= '0';
manager_state.data_out <= manager_word_reset_val;
manager_state.memory(0).reserved(0) <= '0';
manager_state.memory(1).reserved(0) <= '0';
else
-- Write data from SoCBridge driver to address
if socbridge_driver_to_manager.valid = '1' then
@ -79,32 +77,23 @@ begin
or socbridge_driver_to_manager.address = write_address_index then
-- CLEAR BUFFER TO IP CORE
end if;
-- The middle but of the command part is enough to tell if it is a read or write
if std_logic_vector(to_unsigned(word_address, min_bits_to_determine_address)) = read_address_index(min_bits_to_determine_address - 1 downto 0) then
reading <= '1';
end if;
if std_logic_vector(to_unsigned(word_address, min_bits_to_determine_address)) = write_address_index(min_bits_to_determine_address - 1 downto 0) then
writing <= '1';
end if;
-- Is the controller done executing an instruction
else
if controller_to_manager.done_reading = '1' then
reading <= '0';
--manager_state.memory(0) <= manager_word_reset_val;
manager_state.memory(0).reserved(0) <= '0';
end if;
if controller_to_manager.done_writing = '1' then
writing <= '0';
--manager_state.memory(1) <= manager_word_reset_val;
manager_state.memory(1).reserved(0) <= '0';
end if;
end if;
-- Is there a read instruction in memory
if reading = '1' and controller_to_manager.ready = '1' and controller_to_manager.done_reading = '0' then
if read_address.reserved(0) = '1' and controller_to_manager.ready = '1' and controller_to_manager.done_reading = '0' then
manager_to_controller.address <= read_address.address & "0000000000";
manager_to_controller.driver_id <= "1"; -- Only supprts one driver at present
manager_to_controller.seq_mem_access_count <= 2**to_integer(unsigned(read_address.size)) * 2**10;
cmd <= "10";
-- Is there a write instruction in memory
elsif writing = '1' and controller_to_manager.ready = '1' and controller_to_manager.done_writing = '0'then
elsif write_address.reserved(0) = '1' and controller_to_manager.ready = '1' and controller_to_manager.done_writing = '0'then
manager_to_controller.address <= write_address.address & "0000000000";
manager_to_controller.driver_id <= "1"; -- Only supports one driver at present
manager_to_controller.seq_mem_access_count <= 2**to_integer(unsigned(read_address.size)) * 2**10;