Multipacket socbridge works??

This commit is contained in:
Erik Örtenberg 2025-05-21 23:20:10 +02:00
parent 1be1f1bc63
commit 1146970be5

View File

@ -13,7 +13,7 @@ use grlib.stdlib.all;
entity socbridge_driver is
generic(
MAX_PKT_SIZE : integer range 1 to 128 := 32
MAX_PKT_SIZE : integer range 1 to 128 := 8
);
port(
clk : in std_logic;
@ -184,7 +184,9 @@ begin
-- Responses
elsif st.curr_rx_transaction = READ_RESPONSE then
next_rx_state <= RX_R_BODY;
else
elsif local_next_rx_transaction /= NO_OP then
next_rx_state <= RX_HEADER;
else
next_rx_state <= IDLE;
end if;
when RX_R_BODY =>
@ -510,6 +512,16 @@ begin
if not (st.curr_tx_state = TX_HEADER and (st.curr_tx_transaction = WRITE or st.curr_tx_transaction = WRITE_ADD)) then
st.write_in_flight <= false;
end if;
if next_rx_transaction /= NO_OP then
st.curr_rx_transaction <= next_rx_transaction;
st.rx_data_size <= next_rx_data_size;
if next_rx_transaction = WRITE_ADD or next_rx_transaction = WRITE
or next_rx_transaction = READ_RESPONSE then
st.rx_stage <= next_rx_data_size;
else
st.rx_stage <= 0;
end if;
end if;
elsif st.curr_rx_transaction = READ_RESPONSE then
if not (st.curr_tx_state = TX_HEADER and (st.curr_tx_transaction = READ or st.curr_tx_transaction = READ_ADD)) then
st.read_in_flight <= false;
@ -618,7 +630,8 @@ begin
end if;
if trans_st.write.curr_inst.seq_mem_access_count mod 256 = 0 then
trans_st.write.is_first_word <= '1';
elsif trans_st.read.curr_inst.instruction /= NO_OP then
elsif st.last_sent_transaction = READ or st.last_sent_transaction = READ_ADD
or next_tx_transaction = READ or next_tx_transaction = READ_ADD then
trans_st.write.is_first_word <= '1';
else
trans_st.write.is_first_word <= '0';
@ -633,6 +646,14 @@ begin
end if;
trans_st.read.is_first_word <= '1';
when SEND =>
if trans_st.read.curr_inst.seq_mem_access_count mod 256 = 0 then
trans_st.read.is_first_word <= '1';
elsif st.last_sent_transaction = WRITE or st.last_sent_transaction = WRITE_ADD
or next_tx_transaction = WRITE or next_tx_transaction = WRITE_ADD then
trans_st.read.is_first_word <= '1';
else
trans_st.read.is_first_word <= '0';
end if;
when SEND_ACCEPTED =>
trans_st.read.curr_inst.seq_mem_access_count <= trans_st.read.curr_inst.seq_mem_access_count - MAX_PKT_SIZE;
trans_st.read.curr_inst.address <= std_logic_vector(unsigned(trans_st.read.curr_inst.address) + MAX_PKT_SIZE);
@ -645,7 +666,8 @@ begin
end if;
if trans_st.read.curr_inst.seq_mem_access_count mod 256 = 0 then
trans_st.read.is_first_word <= '1';
elsif trans_st.write.curr_inst.instruction /= NO_OP then
elsif st.last_sent_transaction = WRITE or st.last_sent_transaction = WRITE_ADD
or next_tx_transaction = WRITE or next_tx_transaction = WRITE_ADD then
trans_st.read.is_first_word <= '1';
else
trans_st.read.is_first_word <= '0';