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continued refatctoring. Still not done

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This commit is contained in:
Adam 2025-03-12 16:45:44 +01:00
parent dba8b1a86d
commit 695745c198
4 changed files with 23 additions and 33 deletions
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36
src/control_socbridge_merge/control_socbridge_tb.vhd
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@ -7,10 +7,10 @@ library socbridge;
use socbridge.socbridge_driver_tb_pkg.all;
library controller;
entity control_socbridge_tb is
end entity control_socbridge_tb;
entity controller_socbridge_tb is
end entity controller_socbridge_tb;
architecture tb of control_socbridge_tb is
architecture tb of controller_socbridge_tb is
constant CLK_PERIOD : Time := 10 ns;
constant SIMULATION_CYCLE_COUNT : integer := 2000;
@ -35,13 +35,10 @@ architecture tb of control_socbridge_tb is
seq_mem_access_count => 0,
cmd => "00"
);
signal driver_to_controller: driver_to_control_t := (is_active => '0');
signal driver_to_controller: driver_to_controller_t := (is_active => '0');
signal controller_to_cpu: controller_to_cpu_t;
signal controller_to_driver: controller_to_driver_t;
signal driver_to_control: driver_to_control_t;
signal control_to_driver: control_to_driver_t;
signal curr_word : std_logic_vector(ext_socbridge_in.payload'length - 1 downto 0);
signal expected_out : std_logic_vector(ext_socbridge_out.payload'length - 1 downto 0);
@ -83,15 +80,15 @@ begin
port map(
clk => clk,
rst => rst,
ctrl_in => control_to_driver,
ctrl_out => driver_to_control,
ctrl_in => controller_to_driver,
ctrl_out => driver_to_controller,
ext_in => ext_socbridge_in,
ext_out => ext_socbridge_out,
int_in => int_socbridge_in,
int_out => int_socbridge_out
);
control_unit_inst: entity controller.control_unit
controller_unit_inst: entity controller.control_unit
port map(
clk => clk,
rst => rst,
@ -101,22 +98,15 @@ begin
controller_to_driver => controller_to_driver
);
control_to_driver.address <= controller_to_driver.address;
control_to_driver.request <= controller_to_driver.driver_id(0);
control_to_driver.instruction <= controller_to_driver.instruction;
control_to_driver.seq_mem_access_count <= controller_to_driver.seq_mem_access_count;
driver_to_controller.active_driver(0) <= driver_to_control.is_active;
ext_socbridge_in.control(1) <= clk;
control_clock_proc: process
controller_clock_proc: process
begin
for i in 0 to SIMULATION_CYCLE_COUNT - 1 loop
wait for CLK_PERIOD / 2;
clk <= not clk;
end loop;
wait;
end process control_clock_proc;
end process controller_clock_proc;
stimulus_proc: process
begin
@ -131,21 +121,21 @@ begin
rst <= '0';
cpu_to_controller.address <= x"FA0FA0FA";
cpu_to_controller.cmd <= "01";
wait until driver_to_controller.active_driver(0) = '1';
wait until driver_to_controller.is_active = '1';
report "Task received in driver, awaiting completion...";
cpu_to_controller.address <= (others => '0');
cpu_to_controller.cmd <= "00";
wait until driver_to_controller.active_driver(0) = '0';
wait until driver_to_controller.is_active = '0';
wait for CLK_PERIOD;
report "Task completed in driver, sending next task...";
cpu_to_controller.address <= x"FA0FA0FA";
cpu_to_controller.cmd <= "10";
wait for CLK_PERIOD;
wait until driver_to_controller.active_driver(0) = '1';
wait until driver_to_controller.is_active = '1';
report "Task received in driver, awaiting completion...";
cpu_to_controller.address <= (others => '0');
cpu_to_controller.cmd <= "00";
wait until driver_to_controller.active_driver(0) = '0';
wait until driver_to_controller.is_active = '0';
wait for CLK_PERIOD;
report "Task completed in driver, ending simulation stimulus";
cpu_to_controller.address <= (others => '0');

8
src/socbridge/socbridge_driver.vhd
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@ -11,10 +11,10 @@ entity socbridge_driver is
port(
clk : in std_logic;
rst : in std_logic;
ctrl_in : in control_to_driver_t;
ctrl_out: out driver_to_control_t;
ext_in : in ext_socbridge_in_t;
ext_out : out ext_socbridge_out_t;
ctrl_in : in controller_to_driver_t;
ctrl_out: out driver_to_controller_t;
ext_in : in ext_to_socbridge_driver_t;
ext_out : out socbridge_driver_to_ext_t;
int_out : out int_socbridge_out_t;
int_in : in int_socbridge_in_t
);

4
src/socbridge/socbridge_driver_tb.vhd
View File

@ -21,8 +21,8 @@ architecture tb of socbridge_driver_tb is
signal ext_out : ext_socbridge_out_t;
signal int_in : int_socbridge_in_t;
signal int_out : int_socbridge_out_t;
signal ctrl_in : control_to_driver_t;
signal ctrl_out : driver_to_control_t;
signal ctrl_in : controller_to_driver_t;
signal ctrl_out : driver_to_controller_t;
signal curr_word : std_logic_vector(ext_in.payload'length - 1 downto 0);
signal expected_out : std_logic_vector(ext_out.payload'length - 1 downto 0);

8
src/socbridge/socbridge_driver_tb_pkg.vhd
View File

@ -24,7 +24,7 @@ package socbridge_driver_tb_pkg is
type translator_state_t is (IDLE, SEND, SEND_ACCEPTED, AWAIT);
type translator_state_rec_t is record
curr_inst : control_to_driver_t;
curr_inst : controller_to_driver_t;
curr_state : translator_state_t;
is_first_word : std_logic;
end record translator_state_rec_t;
@ -48,7 +48,7 @@ package socbridge_driver_tb_pkg is
) return std_logic;
pure function create_io_type_out_from_ext_protocol(
input: ext_protocol_t
) return ext_socbridge_out_t;
) return socbridge_driver_to_ext_t;
function to_string ( a: std_logic_vector) return string;
pure function get_cmd_bits(command : command_t) return std_logic_vector;
pure function get_size_bits(size : command_size_t) return std_logic_vector;
@ -97,8 +97,8 @@ package body socbridge_driver_tb_pkg is
pure function create_io_type_out_from_ext_protocol(
input : ext_protocol_t
) return ext_socbridge_out_t is
variable val : ext_socbridge_out_t;
) return socbridge_driver_to_ext_t is
variable val : socbridge_driver_to_ext_t;
begin
val.payload:= input.data;
val.control(1) := input.clk;